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SI8441 Scheda tecnica(PDF) 5 Page - Silicon Laboratories

Il numero della parte SI8441
Spiegazioni elettronici  LOW-POWER QUAD-CHANNEL DIGITAL ISOLATOR
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Produttore elettronici  SILABS [Silicon Laboratories]
Homepage  http://www.silabs.com
Logo SILABS - Silicon Laboratories

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Si8440/41/42/45
Rev. 1.5
5
Table 3. Electrical Characteristics
(VDD1 = 5 V ±10%, VDD2 = 5 V ±10%, TA = –40 to 125 ºC; applies to narrow and wide-body SOIC packages)
Parameter
Symbol
Test Condition
Min
Typ
Max
Unit
High Level Input Voltage
VIH
2.0
V
Low Level Input Voltage
VIL
——
0.8
V
High Level Output Voltage
VOH
loh = –4 mA
VDD1,VDD2 –0.4
4.8
V
Low Level Output Voltage
VOL
lol = 4 mA
0.2
0.4
V
Input Leakage Current
IL
——
±10
µA
Output Impedance1
ZO
—85
Enable Input High Current
IENH
VENx =VIH
—2.0
µA
Enable Input Low Current
IENL
VENx =VIL
—2.0
µA
DC Supply Current (All inputs 0 V or at Supply)
Si8440Ax, Bx and Si8445Bx
VDD1
VDD2
VDD1
VDD2
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.5
2.5
5.7
2.6
2.3
3.8
8.6
3.9
mA
Si8441Ax, Bx
VDD1
VDD2
VDD1
VDD2
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
1.8
2.5
4.9
3.6
2.7
3.8
7.4
5.4
mA
Si8442Ax, Bx
VDD1
VDD2
VDD1
VDD2
All inputs 0 DC
All inputs 0 DC
All inputs 1 DC
All inputs 1 DC
2.3
2.3
4.5
4.5
3.5
3.5
6.8
6.8
mA
1 Mbps Supply Current (All inputs = 500 kHz square wave, CI = 15 pF on all outputs)
Si8440Ax, Bx and Si8445Bx
VDD1
VDD2
3.6
3.0
5.4
3.9
mA
Si8441Ax, Bx
VDD1
VDD2
3.5
3.4
5.3
5.1
mA
Si8442Ax, Bx
VDD1
VDD2
3.6
3.6
5.4
5.4
mA
Notes:
1. The nominal output impedance of an isolator driver channel is approximately 85
, ±40%, which is a combination of the
value of the on-chip series termination resistor and channel resistance of the output driver FET. When driving loads
where transmission line effects will be a factor, output pins should be appropriately terminated with controlled
impedance PCB traces.
2. tPSK(P-P) is the magnitude of the difference in propagation delay times measured between different units operating at
the same supply voltages, load, and ambient temperature.
3. See "3. Errata and Design Migration Guidelines" on page 25 for more details.
4. Start-up time is the time period from the application of power to valid data at the output.


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