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TPA3117D2 Scheda tecnica(PDF) 2 Page - Texas Instruments |
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TPA3117D2 Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 30 page TPA3117D2 SLOS672 – OCTOBER 2010 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. ABSOLUTE MAXIMUM RATINGS over operating free-air temperature range (unless otherwise noted) (1) UNIT VCC Supply voltage AVCC, PVCC –0.3V to 30V SD, GAIN0, GAIN1, PBTL, FSEL(2) –0.3V to VCC + 0.3V VI Interface pin voltage PLIMIT –0.3V to REG_OUT + 0.3V RINN, RINP, LINN, LINP –0.3V to 6.3V Continuous total power dissipation See Dissipation Rating Table TA Operating free-air temperature range –40°C to 85°C TJ Operating junction temperature range(3) –40°C to 150°C Tstg Storage temperature range –65°C to 150°C BTL: PVCC > 15V 4.8 RL Minimum Load Resistance BTL: PVCC ≤ 15V 3.2 PBTL 3.2 Human body model (4) (all pins) ±2kV ESD Electrostatic discharge Charged-device model (5) (all pins) ±500V (1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operations of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) For input voltage >6V, a series current limiting resistor of at least 100k Ω is recommended. (3) The TPA3117D2 incorporates an exposed thermal pad on the underside of the chip. This acts as a heatsink, and it must be connected to a thermally dissipating plane for proper power dissipation. Failure to do so may result in the device going into thermal protection shutdown. (4) In accordance with JEDEC Standard 22, Test Method A114-B. (5) In accordance with JEDEC Standard 22, Test Method C101-A RECOMMENDED OPERATING CONDITIONS over operating free-air temperature range (unless otherwise noted) PARAMETER TEST CONDITIONS MIN MAX UNIT VCC Supply voltage PVCC, AVCC 8 26 V VIH High-level input voltage SD, GAIN0, GAIN1, PBTL, FSEL 2 V VIL Low-level input voltage SD, GAIN0, GAIN1, PBTL, FSEL 0.8 V IIH High-level input current SD, GAIN0, GAIN1, PBTL, FSEL, VI = 2V, VCC = 18V 50 µA IIL Low-level input current SD, GAIN0, GAIN1, PBTL, FSEL, VI = 0.8V, VCC = 18V 5 µA TA Operating free-air temperature –40 85 °C THERMAL INFORMATION TPA3117D2 THERMAL METRIC(1) UNITS RHB (32 PINS) qJA Junction-to-ambient thermal resistance 33.7 qJC(top) Junction-to-case(top) thermal resistance 36.3 qJB Junction-to-board thermal resistance 9.8 °C/W yJT Junction-to-top characterization parameter 0.6 yJB Junction-to-board characterization parameter 9.5 qJC(bottom) Junction-to-case(bottom) thermal resistance 3.2 (1) For more information about traditional and new thermal metrics, see the IC Package Thermal Metrics application report, SPRA953. 2 Submit Documentation Feedback Copyright © 2010, Texas Instruments Incorporated Product Folder Link(s) :TPA3117D2 |
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