CAT22C10PA-20TE13 datasheet(7/10 Pages) CATALYST

Il numero della parte	CAT22C10PA-20TE13

Spiegazioni elettronici	256-Bit Nonvolatile CMOS Static RAM

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Produttore elettronici	CATALYST [Catalyst Semiconductor]

Homepage	http://www.catalyst-semiconductor.com

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CAT22C10

7

Doc. No. 25018-0A 2/98 N-1

Write

With the chip enabled and the nonvolatile functions

inhibited, the Write Enable (

WE) pin will select the write

mode when driven to a low level. In this mode, the

address must be supplied for the byte being written.

After the set-up time (tAS), the input data must be

supplied to pins I/O0–I/O3. When these conditions, in-

Figure 2. Write Cycle Timing

5153 FHD F04

Figure 3. Early Write Cycle Timing

5153 FHD F05

cluding the write pulse width time (tWP) are met, the data

will be written to the specified location in the Static RAM.

A write function may also be initiated from the standby

mode by driving

WE low, inhibiting the nonvolatile func-

tions, supplying valid addresses, and then taking

CS low

and supplying input data.

tWC

tAS

tWR

DATA VALID

CS

DATA IN

ADDRESS

WE

tWP

tDW

tCW

tDH

DATA OUT

HIGH-Z

tWC

tAS

tWR

DATA VALID

CS

DATA IN

ADDRESS

WE

tWP

tDW

tCW

tDH

DATA OUT

tWZ

tOW

HIGH-Z

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