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AD5696R Scheda tecnica(PDF) 1 Page - Analog Devices

Il numero della parte AD5696R
Spiegazioni elettronici  Quad, 16-/12-Bit nanoDAC with I2C Interface
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

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Quad, 16-/12-Bit nanoDAC+
with I2C Interface
Data Sheet
AD5696/AD5694
Rev. A
Document Feedback
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibilityisassumedbyAnalogDevicesforitsuse,norforanyinfringementsofpatentsorother
rightsofthirdpartiesthatmayresultfromitsuse.Specificationssubjecttochangewithoutnotice.No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarksandregisteredtrademarksarethepropertyoftheirrespectiveowners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
©2012–2013 Analog Devices, Inc. All rights reserved.
Technical Support
www.analog.com
FEATURES
High relative accuracy (INL): ±2 LSB maximum at 16 bits
Tiny package: 3 mm × 3 mm, 16-lead LFCSP
Total unadjusted error (TUE): ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
High drive capability: 20 mA, 0.5 V from supply rails
User-selectable gain of 1 or 2 (GAIN pin)
Reset to zero scale or midscale (RSTSEL pin)
1.8 V logic compatibility
400 kHz I2C-compatible serial interface
4 I2C addresses available
Low glitch: 0.5 nV-sec
Robust 3.5 kV HBM and 1.5 kV FICDM ESD rating
Low power: 1.8 mW at 3 V
2.7 V to 5.5 V power supply
−40°C to +105°C temperature range
APPLICATIONS
Digital gain and offset adjustment
Programmable attenuators
Process control (PLC I/O cards)
Industrial automation
Data acquisition systems
FUNCTIONAL BLOCK DIAGRAM
Figure 1.
GENERAL DESCRIPTION
The AD5696 and AD5694, members of the nanoDAC+™ family,
are low power, quad, 16-/12-bit buffered voltage output DACs.
The devices include a gain select pin giving a full-scale output
of 2.5 V (gain = 1) or 5 V (gain = 2). The devices operate from
a single 2.7 V to 5.5 V supply, are guaranteed monotonic by
design, and exhibit less than 0.1% FSR gain error and 1.5 mV
offset error performance. The devices are available in a 3 mm ×
3 mm LFCSP package and in a TSSOP package.
The AD5696/AD5694 incorporate a power-on reset circuit and a
RSTSEL pin; the RSTSEL pin ensures that the DAC outputs power
up to zero scale or midscale and remain at that level until a valid
write takes place. The parts contain a per-channel power-down
feature that reduces the current consumption of the device in
power-down mode to 4 µA at 3 V.
The AD5696/AD5694 use a versatile 2-wire serial interface that
operates at clock rates up to 400 kHz and include a VLOGIC pin
intended for 1.8 V/3 V/5 V logic.
Table 1. Quad nanoDAC+ Devices
Interface
Reference
16-Bit
14-Bit
12-Bit
SPI
Internal
AD5686R
AD5685R
AD5684R
External
AD5686
AD5684
I2C
Internal
AD5696R
AD5695R
AD5694R
External
AD5696
AD5694
PRODUCT HIGHLIGHTS
1. High Relative Accuracy (INL).
AD5696 (16-bit): ±2 LSB maximum
AD5694 (12-bit): ±1 LSB maximum
2. Excellent DC Performance.
Total unadjusted error: ±0.1% of FSR maximum
Offset error: ±1.5 mV maximum
Gain error: ±0.1% of FSR maximum
3. Two Package Options.
3 mm × 3 mm, 16-lead LFCSP
16-lead TSSOP
SCL
VLOGIC
SDA
A1
A0
INPUT
REGISTER
DAC
REGISTER
STRING
DAC A
BUFFER
VOUTA
INPUT
REGISTER
DAC
REGISTER
STRING
DAC B
BUFFER
VOUTB
INPUT
REGISTER
DAC
REGISTER
STRING
DAC C
BUFFER
VOUTC
INPUT
REGISTER
DAC
REGISTER
STRING
DAC D
BUFFER
VOUTD
VREF
GND
VDD
POWER-
DOWN
LOGIC
POWER-ON
RESET
GAIN =
×1/×2
RSTSEL
GAIN
LDAC RESET
AD5696/AD5694


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