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CAT28C64BH13I12T Scheda tecnica(PDF) 6 Page - ON Semiconductor |
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CAT28C64BH13I12T Scheda tecnica(HTML) 6 Page - ON Semiconductor |
6 / 13 page CAT28C64B 6 Doc. No. MD-1011, Rev. I © 2009 SCILLC. All rights reserved. Characteristics subject to change without notice A.C. CHARACTERISTICS, Write Cycle VCC = 5V ±10%, unless otherwise specified. 28C64B-90 28C64B-12 28C64B-15 Symbol Parameter Min. Max. Min. Max. Min. Max. Units tWC Write Cycle Time 5 5 5 ms tAS Address Setup Time 0 0 0 ns tAH Address Hold Time 100 100 100 ns tCS CE Setup Time 0 0 0 ns tCH CE Hold Time 0 0 0 ns tCW(2) CE Pulse Time 110 110 110 ns tOES OE Setup Time 0 0 0 ns tOEH OE Hold Time 0 0 0 ns tWP(2) WE Pulse Width 110 110 110 ns tDS Data Setup Time 60 60 60 ns tDH Data Hold Time 0 0 0 ns tINIT(1) Write Inhibit Period After Power-up 5 10 5 10 5 10 ms tBLC(1)(3) Byte Load Cycle Time .05 100 .05 100 .05 100 µs Note: (1) This parameter is tested initially and after a design or process change that affects the parameter. (2) A write pulse of less than 20ns duration will not initiate a write cycle. (3) A timer of duration tBLC max. begins with every LOW to HIGH transition of WE. If allowed to time out, a page or byte write will begin; however a transition from HIGH to LOW within tBLC max. stops the timer. |
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