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74LVC1G97GV Scheda tecnica(PDF) 2 Page - NXP Semiconductors |
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74LVC1G97GV Scheda tecnica(HTML) 2 Page - NXP Semiconductors |
2 / 20 page 74LVC1G97 All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3 — 7 December 2011 2 of 20 NXP Semiconductors 74LVC1G97 Low-power configurable multiple function gate 3. Ordering information 4. Marking [1] The pin 1 indicator is located on the lower left corner of the device, below the marking code. 5. Functional diagram Table 1. Ordering information Type number Package Temperature range Name Description Version 74LVC1G97GW 40 Cto+125 C SC-88 plastic surface-mounted package; 6 leads SOT363 74LVC1G97GV 40 Cto+125 C SC-74 plastic surface mounted package; 6 leads SOT457 74LVC1G97GM 40 Cto+125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1.45 0.5 mm SOT886 74LVC1G97GF 40 Cto+125 C XSON6 plastic extremely thin small outline package; no leads; 6 terminals; body 1 1 0.5 mm SOT891 74LVC1G97GN 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 0.9 1.0 0.35 mm SOT1115 74LVC1G97GS 40 C to +125 C XSON6 extremely thin small outline package; no leads; 6 terminals; body 1.0 1.0 0.35 mm SOT1202 Table 2. Marking Type number Marking code[1] 74LVC1G97GW YV 74LVC1G97GV Y97 74LVC1G97GM YV 74LVC1G97GF YV 74LVC1G97GN YV 74LVC1G97GS YV Fig 1. Logic symbol 001aad998 A Y 4 B C 3 1 6 |
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