74AUP1G32GM datasheet(1/21 Pages) NXP

Il numero della parte	74AUP1G32GM

Spiegazioni elettronici	Low-power 2-input OR-gate

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Produttore elettronici	NXP [NXP Semiconductors]

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1.

General description

The 74AUP1G32 provides the single 2-input OR function.

Schmitt-trigger action at all inputs makes the circuit tolerant to slower input rise and fall

times across the entire VCC range from 0.8 V to 3.6 V.

This device ensures a very low static and dynamic power consumption across the entire

VCC range from 0.8 V to 3.6 V.

This device is fully specified for partial power-down applications using IOFF.

The IOFF circuitry disables the output, preventing the damaging backflow current through

the device when it is powered down.

2.

Features and benefits

 Wide supply voltage range from 0.8 V to 3.6 V

 High noise immunity

 Complies with JEDEC standards:

 JESD8-12 (0.8 V to 1.3 V)

 JESD8-11 (0.9 V to 1.65 V)

 JESD8-7 (1.2 V to 1.95 V)

 JESD8-5 (1.8 V to 2.7 V)

 JESD8-B (2.7 V to 3.6 V)

 ESD protection:

 HBM JESD22-A114F Class 3A exceeds 5000 V

 MM JESD22-A115-A exceeds 200 V

 CDM JESD22-C101E exceeds 1000 V

 Low static power consumption; ICC = 0.9 A (maximum)

 Latch-up performance exceeds 100 mA per JESD 78 Class II

 Inputs accept voltages up to 3.6 V

 Low noise overshoot and undershoot < 10 % of VCC

 IOFF circuitry provides partial power-down mode operation

 Multiple package options

 Specified from

40 Cto+85 C and 40 Cto+125 C

74AUP1G32

Low-power 2-input OR-gate

Rev. 7 — 8 July 2013

Product data sheet

Codice articolo simile - 74AUP1G32GM

Produttore elettronici	Il numero della parte	Scheda tecnica	Spiegazioni elettronici
NXP Semiconductors	74AUP1G32GM	83Kb / 16P	Low-power 2-input OR gate Rev. 01-2 August 2005
Nexperia B.V. All right...	74AUP1G32GM	273Kb / 18P	Low-power 2-input OR-gate Rev. 11 - 17 January 2022
Nexperia B.V. All right...	74AUP1G32GM-Q100	227Kb / 14P	Low-power 2-input OR-gate

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Descrizione simile - 74AUP1G32GM

Produttore elettronici	Il numero della parte	Scheda tecnica	Spiegazioni elettronici
NXP Semiconductors	74AUP1G32	83Kb / 16P	Low-power 2-input OR gate Rev. 01-2 August 2005
Nexperia B.V. All right...	74AUP1G32	273Kb / 18P	Low-power 2-input OR-gate Rev. 11 - 17 January 2022
	74AXP1G32	797Kb / 17P	Low-power 2-input OR gate
	74AUP1G32-Q100	227Kb / 14P	Low-power 2-input OR-gate
NXP Semiconductors	74AUP2G32	100Kb / 17P	Low-power dual 2-input OR gate Rev. 03-8 January 2009
Nexperia B.V. All right...	74AUP2G32	302Kb / 20P	Low-power dual 2-input OR gate Rev. 9 - 24 June 2022
Nexperia B.V. All right...	74AXP1G86	835Kb / 17P	Low-power 2-input EXCLUSIVE-OR gate
NXP Semiconductors	74AUP1G86	67Kb / 17P	Low-power 2-input EXCLUSIVE-OR gate Rev. 02.00-16 May 2006
Nexperia B.V. All right...	74AUP1G86-Q100	222Kb / 14P	Low-power 2-input EXCLUSIVE-OR gate
Nexperia B.V. All right...	74AUP1G86	274Kb / 18P	Low-power 2-input EXCLUSIVE-OR gate Rev. 8 - 24 January 2022

More results

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