2

2

+

+

D3

C7

C9

C10

D4

D8

V+

+

-

+

-

2

2

+

+

D3

C7

C8

C9

C10

D4

D5

D6

D7

D8

R7

R8

D9

R6

+

+

D3

C7

C9

C10

D4

D8

D9

R7

R6

R8

V+

LM3444

www.ti.com

SNVS682C – NOVEMBER 2010 – REVISED MAY 2013

Figure 12. Two and Three Stage Valley Fill Circuit

The valley-fill circuit allows the buck regulator to draw power throughout a larger portion of the AC line. This

power factor correction (PFC) to the application.

VALLEY-FILL OPERATION

When the “input line is high”, power is derived directly through D3. The term “input line is high” can be explained

as follows. The valley-fill circuit charges capacitors C7 and C9 in series (Figure 13) when the input line is high.

Figure 13. Two stage Valley-Fill Circuit when AC Line is High

The peak voltage of a two stage valley-fill capacitor is:

(1)

As the AC line decreases from its peak value every cycle, there will be a point where the voltage magnitude of

the AC line is equal to the voltage that each capacitor is charged. At this point diode D3 becomes reversed

voltage.

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