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AD7874SE3 Scheda tecnica(PDF) 11 Page - Analog Devices |
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AD7874SE3 Scheda tecnica(HTML) 11 Page - Analog Devices |
11 / 16 page AD7874 REV. C –11– Some applications may require that the conversion is initiated by the microprocessor rather than an external timer. One option is to decode the AD7874 CONVST from the address bus so that a write operation starts a conversion. Data is read at the end of the conversion sequence as before. Figure 16 shows an example of initiating conversion using this method. Note that for all interfaces, a read operation should not be attempted dur- ing conversion. AD7874–MC68000 Interface An interface between the AD7874 and the MC68000 is shown in Figure 15. As before, conversion is initiated using an external timer. The AD7874 INT line can be used to interrupt the pro- cessor or, alternatively, software delays can ensure that conver- sion has been completed before a read to the AD7874 is attempted. Because of the nature of its interrupts, the 68000 requires additional logic (not shown in Figure 15) to allow it to be interrupted correctly. For further information on 68000 in- terrupts, consult the 68000 users manual. The MC68000 AS and R/W outputs are used to generate a separate RD input signal for the AD7874. CS is used to drive the 68000 DTACK input to allow the processor to execute a normal read operation to the AD7874. The conversion results are read using the following 68000 instruction: MOVE.W ADC,D0 where D0 is the 68000 D0 register and ADC is the AD7874 address. A0 A15 D15 D0 ADDR DECODE ADDRESS BUS DATA BUS CONVST CS DB11 DB0 RD AD7874* MC68000 *ADDITIONAL PINS OMITTED FOR CLARITY R/W AS EN DTACK TIMER Figure 15. AD7874–MC68000 Interface AD7874–8086 Interface Figure 16 shows an interface between the AD7874 and the 8086 microprocessor. Unlike the previous interface examples, the microprocessor initiates conversion. This is achieved by gating the 8086 WR signal with a decoded address output (different to the AD7874 CS address). The AD7874 INT line is used to in- terrupt the microprocessor when the conversion sequence is completed. Data is read from the AD7874 using the following instruction: MOV AX,ADC where AX is the 8086 accumulator and ADC is the AD7874 address. ALE AD15 AD0 ADDR DECODE ADDRESS BUS ADDRESS/DATA BUS CONVST CS DB11 DB0 RD AD7874* 8086 *ADDITIONAL PINS OMITTED FOR CLARITY WR RD LATCH Figure 16. AD7874–8086 Interface |
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