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74LVCH244A Scheda tecnica(PDF) 9 Page - NXP Semiconductors |
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74LVCH244A Scheda tecnica(HTML) 9 Page - NXP Semiconductors |
9 / 19 page 74LVC_LVCH244A All information provided in this document is subject to legal disclaimers. © NXP B.V. 2013. All rights reserved. Product data sheet Rev. 8 — 26 June 2013 9 of 19 NXP Semiconductors 74LVC244A; 74LVCH244A Octal buffer/line driver; 3-state 11. AC waveforms Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 6. The input (nAn) to output (nYn) propagation delays mna171 nAn input nYn output tPLH tPHL GND VI VM VM VM VM VOH VOL Measurement points are given in Table 8. Logic levels: VOL and VOH are typical output voltage levels that occur with the output load. Fig 7. 3-state enable and disable times. mna362 tPLZ tPHZ outputs disabled outputs enabled VY VX outputs enabled output LOW-to-OFF OFF-to-LOW output HIGH-to-OFF OFF-to-HIGH nOE input VI VOL VOH VCC VM GND GND tPZL tPZH VM VM Table 8. Measurement points Supply voltage Input Output VCC VI VM VM VX VY 1.2 V VCC 0.5 V CC 0.5 V CC VOL + 0.15 V VOH 0.15 V 1.65 V to 1.95 V VCC 0.5 V CC 0.5 V CC VOL + 0.15 V VOH 0.15 V 2.3 V to 2.7 V VCC 0.5 V CC 0.5 V CC VOL + 0.15 V VOH 0.15 V 2.7 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V 3.0 V to 3.6 V 2.7 V 1.5 V 1.5 V VOL + 0.3 V VOH 0.3 V |
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