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LM3410XQMFX Scheda tecnica(PDF) 2 Page - Texas Instruments |
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LM3410XQMFX Scheda tecnica(HTML) 2 Page - Texas Instruments |
2 / 49 page 1 2 3 6 5 4 AGND FB SW VIN DIM PGND 1 2 3 7 6 4 AGND FB SW VIN DIM PGND 5 8 NC NC 2 1 3 5 4 DIM GND FB VIN SW LM3410, LM3410Q SNVS541G – OCTOBER 2007 – REVISED MAY 2013 www.ti.com Connection Diagram Figure 1. 5-Pin SOT-23 (Top Figure 2. 6-Pin WSON (Top View) Figure 3. 8-Pin MSOP-PowerPad View) (Top View) See NGG0006A Package See DBV Package See GDN0008A Package Table 1. Pin Descriptions - 5-Pin SOT-23 Pin Name Function 1 SW Output switch. Connect to the inductor, output diode. 2 GND Signal and power ground pin. Place the bottom resistor of the feedback network as close as possible to this pin. 3 FB Feedback pin. Connect FB to external resistor divider to set output voltage. Dimming and shutdown control input. Logic high enables operation. Duty Cycle from 0 to 100%. Do not allow this pin 4 DIM to float or be greater than VIN + 0.3V. 5 VIN Supply voltage pin for power stage, and input supply voltage. Table 2. Pin Descriptions - 6-Pin WSON Pin Name Function 1 PGND Power ground pin. Place PGND and output capacitor GND close together. 2 VIN Supply voltage for power stage, and input supply voltage. Dimming and shutdown control input. Logic high enables operation. Duty Cycle from 0 to 100%. Do not allow this pin 3 DIM to float or be greater than VIN + 0.3V. 4 FB Feedback pin. Connect FB to external resistor divider to set output voltage. 5 AGND Signal ground pin. Place the bottom resistor of the feedback network as close as possible to this pin and pin 4. 6 SW Output switch. Connect to the inductor, output diode. Signal and Power ground. Connect to pin 1 and pin 5 on top layer. Place 4-6 vias from DAP to bottom layer GND DAP GND plane. 2 Submit Documentation Feedback Copyright © 2007–2013, Texas Instruments Incorporated Product Folder Links: LM3410 LM3410Q |
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