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AD7398BRZ-REEL Scheda tecnica(PDF) 9 Page - Analog Devices

Il numero della parte AD7398BRZ-REEL
Spiegazioni elettronici  Quad, Serial-Input 12-Bit/10-Bit DACs
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

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AD7398/AD7399
Rev. C | Page 9 of 24
TERMINOLOGY
Relative Accuracy (INL)
For the DAC, relative accuracy or integral nonlinearity (INL) is
a measure of the maximum deviation, in LSBs, from a straight
line passing through the endpoints of the DAC transfer function.
Figure 6 illustrates a typical INL vs. code plot.
Differential Nonlinearity (DNL)
Differential nonlinearity is the difference between the measured
change and the ideal 1 LSB change between any two adjacent
codes. A specified differential nonlinearity of ±1 LSB maximum
ensures monotonicity. Figure 8 illustrates a typical DNL vs.
code plot.
Zero-Scale Error (VZSE)
Zero-scale error is a measure of the output voltage error from
zero voltage when zero code is loaded to the DAC register.
Full-Scale Error (VFSE)
Full-scale error is a measure of the output voltage error from
full-scale voltage when full-scale code is loaded to the DAC
register.
Full-Scale Temperature Coefficient (TCVFS)
This is a measure of the change in full-scale error with a change
in temperature. It is expressed in ppm/°C or mV/°C.
DAC Glitch Impulse (Q)
Digital-to-analog glitch impulse is the impulse injected into the
analog output when the input code in the DAC register changes
state. It is normally specified as the area of the glitch in nV −sand
is measured when the digital input code is changed by 1 LSB at the
major carry transition (midscale transition). A plot of the glitch
impulse is shown in Figure 15.
Digital Feedthrough (QDF)
Digital feedthrough is a measure of the impulse injected into
the analog output of the DAC from the digital inputs of the
DAC, but is measured when the DAC output is not updated. CS
Power Supply Sensitivity (PSS)
is held high while the CLK and SDI signals are toggled. It is
specified in nV − s, and is measured with a full-scale code change
on the data bus, such as from all 0s to all 1s and vice versa. A
typical plot of digital feedthrough is shown in Figure 16.
This specification indicates how the output of the DAC is
affected by changes in the power supply voltage. Power supply
sensitivity is quoted in terms of % change in output per % change
in VDD for full-scale output of the DAC. VDD is varied by ±10%.
Reference Feedthrough (VOUT/VREF)
This is a measure of the feedthrough from the VREF input to the
DAC output when the DAC is loaded with all 0s. A 100 kHz,
1 V p-p is applied to VREF. Reference feedthrough is expressed in
dB or mV p-p.


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