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TLP708F Scheda tecnica(PDF) 2 Page - Toshiba Semiconductor |
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TLP708F Scheda tecnica(HTML) 2 Page - Toshiba Semiconductor |
2 / 13 page TLP708,TLP708F 2012-08-07 2 Schematic Absolute Maximum Ratings (Ta = 25℃) Characteristics Symbol Rating Unit Forward Current (Ta < 110 ℃) IF 25 mA Forward Current Derating (Ta ≥ 110 ℃) ΔIF/℃ -0.67 mA/ ℃ Pulse Forward Current (Note 1) (Ta < 110 ℃) IFP 50 mA Pulse Forward Current Derating (Ta ≥ 110 ℃) ΔIFP/℃ -1.34 mA/ ℃ Reverse Voltage VR 5 V Input Power Dissipation (Ta < 110 ℃) PD 40 mW Input Power Dissipation Derating (Ta ≥ 110 ℃) ΔPD/℃ -1.0 mW/ ℃ Output Current (Ta ≤ 125 ℃) IO 25 mA Output Voltage VO 6 V Supply Voltage VCC 6 V Output Power Dissipation (Ta < 110 ℃) PO 80 mW Output Power Dissipation Derating (Ta ≥ 110 ℃) ΔPO/℃ -2.0 mW/ ℃ Operating Temperature Range Topr −40 to 125 ℃ Storage Temperature Range Tstg −55 to 150 ℃ Lead solder Temperature (10s) Tsol 260 ℃ Isolation voltage (Note 2) BVS 5000 Vrms Note: Using continuously under heavy loads (e.g. an application of high temperature/current/voltage and a significant change in temperature, etc.) may cause this product to decrease in reliability significantly even if the operating conditions (i.e. operating temperature/current/voltage, etc.) are within the absolute maximum ratings. Please design the appropriate reliability upon reviewing the Toshiba Semiconductor Reliability Handbook (“Handling Precautions”/“Derating Concept and Methods”) and individual reliability data (i.e. reliability test report and estimated failure rate, etc) Note 1: Pulse width ≤ 1ms, duty=50% Note 2: R.H. ≤ 60%, Ta = 25 ℃, AC 1 min This device is regarded as a two-terminal device: pins 1, 2 and 3 are shorted together, and pins 4, 5 and 6 are shorted together. Input Output H L L H Note: A 0.1 μF bypass capacitor must be connected between pins 6 and 4. Truth Table GND 6 4 SHIELD 3- 1+ 5 VCC VO ICC IF IO |
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