HG

BOOT

ISEN

LG

PGND

FB

Vcc

SD

PWGD

FREQ

SS

SGND

EAO

PGND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

LM2727, LM2737

SNVS205D – AUGUST 2002 – REVISED MARCH 2013

www.ti.com

Connection Diagram

Figure 1. 14-Lead Plastic TSSOP

See Package Number PW0014A

PIN DESCRIPTION

BOOT (Pin 1) - Supply rail for the N-channel MOSFET gate drive. The voltage should be at least one gate threshold above the regulator

input voltage to properly turn on the high-side N-FET.

LG (Pin 2) - Gate drive for the low-side N-channel MOSFET. This signal is interlocked with HG to avoid shoot-through problems.

PGND (Pins 3, 13) - Ground for FET drive circuitry. It should be connected to system ground.

SGND (Pin 4) - Ground for signal level circuitry. It should be connected to system ground.

PWGD (Pin 6) - Power Good. This is an open drain output. The pin is pulled low when the chip is in UVP, OVP, or UVLO mode. During

ISEN (Pin 7) - Current limit threshold setting. This sources a fixed 50µA current. A resistor of appropriate value should be connected

between this pin and the drain of the low-side FET.

EAO (Pin 8) - Output of the error amplifier. The voltage level on this pin is compared with an internally generated ramp signal to determine

the duty cycle. This pin is necessary for compensating the control loop.

SS (Pin 9) - Soft start pin. A capacitor connected between this pin and ground sets the speed at which the output voltage ramps up. Larger

capacitor value results in slower output voltage ramp but also lower inrush current.

FB (Pin 10) - This is the inverting input of the error amplifier, which is used for sensing the output voltage and compensating the control

loop.

FREQ (Pin 11) - The switching frequency is set by connecting a resistor between this pin and ground.

SD (Pin 12) - IC Logic Shutdown. When this pin is pulled low the chip turns off the high side switch and turns on the low side switch. While

HG (Pin 14) - Gate drive for the high-side N-channel MOSFET. This signal is interlocked with LG to avoid shoot-through problems.

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

2

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