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74ACT273SJ Scheda tecnica(PDF) 11 Page - Fairchild Semiconductor |
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74ACT273SJ Scheda tecnica(HTML) 11 Page - Fairchild Semiconductor |
11 / 12 page ©1988 Fairchild Semiconductor Corporation www.fairchildsemi.com 74AC273, 74ACT273 Rev. 1.6.0 11 Physical Dimensions (Continued) Figure 4. 20-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/ .001[.025] C 7 ° TYP 7 ° TYP 10.92 MAX 26.92 24.89 7.11 6.09 1.78 1.14 2.54 7.62 7.87 3.43 3.17 5.33 MAX 3.55 3.17 0.38 MIN 0.36 0.56 0.20 0.35 PIN #1 NOTES: (0.97) |
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