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TLP715 Scheda tecnica(PDF) 1 Page - Toshiba Semiconductor

Il numero della parte TLP715
Spiegazioni elettronici  TOSHIBA PHOTOCOUPLER GaA As IRED & PHOTO-IC
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Produttore elettronici  TOSHIBA [Toshiba Semiconductor]
Homepage  http://www.semicon.toshiba.co.jp/eng
Logo TOSHIBA - Toshiba Semiconductor

TLP715 Scheda tecnica(HTML) 1 Page - Toshiba Semiconductor

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TLP715
2012-12-19
1
Unit in mm
Weight:0.26 g (t yp.)
4.58±0.25
9.7±0.3
0.4±0.1
1.27±0.2
1.25±0.25
7.62±0.25
1 2 3
6 5 4
11-5J1
TOSHIBA
11-5J1
TOSHIBA PHOTOCOUPLER GaAℓAs IRED & PHOTO-IC
TLP715
Isolated Bus Drivers
High Speed Line Receivers
Microprocessor System Interfaces
The Toshiba TLP715 consists of a GaAℓAs light-emitting diode and an
integrated high-gain, high-speed photodetector. This unit is a 6-pin SDIP. The
TLP715 is 50% smaller than the 8-PIN DIP and meets the reinforced insulation
class requirements of international safety standards. Therefore the mounting
area can be reduced in equipment requiring safety standard certification.
The detector has a totem pole output stage to provide both source and sink
driving. The detector IC has an internal shield that provides a guaranteed
common-mode transient immunity of 10 kV / μs.
The TLP715 is buffer logic type. For inverter logic type, the TLP718 is in
line-up.
Buffer logic output (totem pole output)
Guaranteed performance over temperature : −40 to 100°C
Power supply voltage : 4.5 to 20 V
Input current: IFLH = 3mA (Max)
Switching time ( tpLH / tpHL) : 250 ns (Max)
Common-mode transient immunity : ±10 kV / μs (Min)
Isolation voltage : 5000 Vrms (Min)
UL recognized
UL1577, File No.E67349
c-UL recognized
CSA Component Acceptance Service No. 5A, File No.E67349
Option (D4)
TÜV recognized / VDE under application : DIN EN60747-5-5
Maximum Operating Insulation Voltage : 890 VPK
Highest Permissible Over Voltage
: 8000 VPK
(Note) : When a EN60747-5-5 approved type is needed,
Please designate “Option(D4)”
Construction Mechanical Rating
7.62 mm pitch
TLPXXX type
10.16 mm pitch
TLPXXXF type
Creepage Distance
Clearance
Insulation Thickness
7.0 mm (Min)
7.0 mm (Min)
0.4 mm (Min)
8.0 mm (Min)
8.0 mm (Min)
0.4 mm (Min)
Truth Table
Input
LED
Tr1
Tr2
Output
H
ON
ON
OFF
H
L
OFF
OFF
ON
L
Pin Configuration (Top View)
0.1
μF bypass capacitor must be
connected between pins 6 and 4. (Note 5)
Schematic
VCC
VO
GND
ICC
IO
6
5
4
SHIELD
3-
1+
IF
VF
Tr1
Tr2
VCC
GND
SHIELD
1
3
4
5
6
2
1:ANODE
2:N.C.
3:CATHODE
4:GND
5:Vo (Output)
6:Vcc


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