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ADM3072EARZ Scheda tecnica(PDF) 5 Page - Analog Devices

Il numero della parte ADM3072EARZ
Spiegazioni elettronici  3.3 V, 15,-15 kV ESD-Protected
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
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ADM3072EARZ Scheda tecnica(HTML) 5 Page - Analog Devices

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ADM3070E/ADM3071E/ADM3072E/ADM3073E/ADM3074E/ADM3075E/ADM3076E/ADM3077E/ADM3078E
Rev. E | Page 5 of 20
TIMING SPECIFICATIONS—ADM3070E/ADM3071E/ADM3072E
VCC = 3.3 V ± 10%, TA = TMIN to TMAX, unless otherwise noted.
Table 3.
Parameter
Symbol
Min
Typ
Max
Unit
Test Conditions/Comments
DRIVER
Maximum Data Rate
250
kbps
Propagation Delay, Low-to-High Level
tDPLH
250
1500
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Propagation Delay, High-to-Low Level
tDPHL
250
1500
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
Rise Time/Fall Time
tDR/tDF
350
1600
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)
|tDPLH − tDPHL| Differential Driver Output Skew
tDSKEW
200
ns
CL = 50 pF, RL = 54 Ω (see Figure 8 and Figure 9)1
Enable to Output High
tDZH
2500
ns
See Figure 10
Enable to Output Low
tDZL
2500
ns
See Figure 11
Disable Time from Low
tDLZ
100
ns
See Figure 11
Disable Time from High
tDHZ
100
ns
See Figure 10
Enable Time from Shutdown to High
tDZH(SHDN)
5500
ns
See Figure 10
Enable Time from Shutdown to Low
tDZL(SHDN)
5500
ns
See Figure 11
RECEIVER
Maximum Data Rate
250
kbps
Propagation Delay, Low-to-High Level
tRPLH
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
Propagation Delay, High-to-Low Level
tRPHL
200
ns
CL = 15 pF (see Figure 12 and Figure 13)
|tRPLH − tRPHL| Output Skew
tRSKEW
30
ns
CL = 15 pF (see Figure 12 and Figure 13)
Enable to Output High
tRZH
50
ns
See Figure 14
Enable to Output Low
tRZL
50
ns
See Figure 14
Disable Time from Low
tRLZ
50
ns
See Figure 14
Disable Time from High
tRHZ
50
ns
See Figure 14
Enable Time from Shutdown to High
tRZH(SHDN)
4000
ns
See Figure 14
Enable Time from Shutdown to Low
tRZL(SHDN)
4000
ns
See Figure 14
TIME TO SHUTDOWN
tSHDN
50
200
600
ns
1 VCC = 3.3 V.


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