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AD5307ARU Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte AD5307ARU
Spiegazioni elettronici  2.5 V to 5.5 V, 400 muA, Quad Voltage Output
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD5307ARU Scheda tecnica(HTML) 4 Page - Analog Devices

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AD5307/AD5317/AD5327
Rev. C | Page 4 of 28
A Version1
B Version
Parameter2
Min
Typ
Max
Min
Typ
Max
Unit
Conditions/Comments
LOGIC INPUTS
Input Current
±1
±1
mA
Input Low Voltage, VIL
0.8
0.8
V
VDD = 5 V ± 10%
0.6
0.6
V
VDD = 3 V ± 10%
0.5
0.5
V
VDD = 2.5 V
Input High Voltage, VIH
(Excluding DCEN)
1.7
1.7
V
VDD = 2.5 V to 5.5 V; TTL and
1.8 V CMOS compatible
Input High Voltage, VIH
(DCEN)
2.4
2.4
VDD = 5 V ± 10%
2.1
2.1
V
VDD = 3 V ± 10%
2.0
2.0
V
VDD = 2.5 V
Pin Capacitance
3
3
pF
LOGIC OUTPUT (SDO)
VDD = 4.5 V to 5.5 V
Output Low Voltage, VOL
0.4
0.4
V
ISINK = 2 mA
Output High Voltage, VOH
VDD − 1
VDD − 1
V
ISOURCE = 2 mA
VDD = 2.5 V to 3.6 V
Output Low Voltage, VOL
0.4
0.4
V
ISINK = 2 mA
Output High Voltage, VOH
VDD
0.5
VDD
0.5
V
ISOURCE = 2 mA
Floating State Leakage Current
±1
±1
μA
DCEN = GND
Floating State Output Capacitance
3
3
pF
DCEN = GND
POWER REQUIREMENTS
VDD
2.5
5.5
2.5
5.5
V
IDD (Normal Mode)8
VIH = VDD and VIL = GND
VDD = 4.5 V to 5.5 V
500
900
500
900
μA
VDD = 2.5 V to 3.6 V
400
750
400
750
μA
All DACs in unbuffered mode; in
buffered mode, extra current is
typically x mA per DAC, where
x = 5 mA + VREF/RDAC
IDD (Power-Down Mode)
VIH = VDD and VIL = GND
VDD = 4.5 V to 5.5 V
0.3
1
0.3
1
μA
VDD = 2.5 V to 3.6 V
0.09
1
0.09
1
μA
1 Temperature range (A, B versions): −40°C to +105°C; typical at +25°C.
2 See the Terminology section.
3 DC specifications tested with the outputs unloaded, unless otherwise noted.
4 Linearity is tested using a reduced code range: AD5307 (Code 8 to Code 255); AD5317 (Code 28 to Code 1023); AD5327 (Code 115 to Code 4095).
5 This corresponds to x codes, where x = deadband voltage/LSB size.
6 Guaranteed by design and characterization; not production tested.
7 For the amplifier output to reach its minimum voltage, offset error must be negative. For the amplifier output to reach its maximum voltage, VREF = VDD and offset plus
gain error must be positive.
8 Interface inactive. All DACs active. DAC outputs unloaded.


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