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AD734BNZ Scheda tecnica(PDF) 10 Page - Analog Devices |
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AD734BNZ Scheda tecnica(HTML) 10 Page - Analog Devices |
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10 / 20 page  AD734 Rev. E | Page 10 of 20 FUNCTIONAL DESCRIPTION The AD734 embodies more than two decades of experience in the design and manufacture of analog multipliers to provide: • A new output amplifier design with more than 20 times the slew rate of the AD534 (450 V/μs vs. 20 V/μs) for a full power (20 V p-p) bandwidth of 10 MHz. • Very low distortion, even at full power, through the use of circuit and trimming techniques that virtually eliminate all of the spurious nonlinearities found in earlier designs. • Direct control of the denominator, resulting in higher multiplier accuracy and a gain-bandwidth product at small denominator values that is typically 200 times greater than that of the AD534 in divider modes. • Very clean transient response, achieved through the use of a novel input stage design and wideband output amplifier, which also ensure that distortion remains low even at high frequencies. • Superior noise performance by careful choice of device geometries and operating conditions, which provide a guaranteed 88 dB of dynamic range in a 20 kHz bandwidth. Figure 3 shows the lead configuration of the 14-lead PDIP and CERDIP packages. Figure 1 is a simplified block diagram of the AD734. Operation is similar to that of the industry-standard AD534, and in many applications, these parts are pin compatible. The main functional difference is the provision for direct control of the denominator voltage, U, explained fully in the Direct Denominator Control section. Internal signals are in the form of currents, but the function of the AD734 can be understood using voltages throughout, as shown in Figure 1. The AD734 differential X, Y, and Z inputs are handled by wideband interfaces that have low offset, low bias current, and low distortion. The AD734 responds to the difference signals X = X1 − X2, Y = Y1 − Y2, and Z = Z1 − Z2, and rejects common- mode voltages on these inputs. The X, Y, and Z interfaces provide a nominal full-scale (FS) voltage of ±10 V, but, due to the special design of the input stages, the linear range of the differential input can be as large as ±17 V. Also, unlike previous designs, the response on these inputs is not clipped abruptly above ±15 V, but drops to a slope of one half. The bipolar input signals X and Y are multiplied in a translinear core of novel design to generate the product XY/U. The denomina- tor voltage, U, is internally set to an accurate, temperature-stable value of 10 V, derived from a buried-Zener reference. An uncali- brated fraction of the denominator voltage U appears between the voltage reference pin (ER) and the negative supply pin (VN), for use in certain applications where a temperature-compensated voltage reference is desirable. The internal denominator, U, can be disabled, by connecting the denominator disable Pin 13 (DD) to the positive supply pin (VP); the denominator can then be replaced by a fixed or variable external voltage ranging from 10 mV to more than 10 V. The high gain output op amp nulls the difference between XY/ U and an additional signal, Z, to generate the final output, W. The actual transfer function can take on several forms, depending on the connections used. The AD734 can perform all of the functions supported by the AD534, and new functions using the direct-division mode provided by the U interface. Each input pair (X1 and X2, Y1 and Y2, Z1 and Z2) has a differential input resistance of 50 kΩ; this is formed by actual resistors (not a small-signal approximation) and is subject to a tolerance of ±20%. The common-mode input resistance is several megohms and the parasitic capacitance is about 2 pF. The bias currents associated with these inputs are nulled by laser-trimming, such that when one input of a pair is optionally ac-coupled and the other is grounded, the residual offset voltage is typically less than 5 mV, which corresponds to a bias current of only 100 nA. This low bias current ensures that mismatches in the sources’ resistances at a pair of inputs does not cause an offset error. These currents remain low over the full temperature range and supply voltages. The common-mode range of the X, Y, and Z inputs does not fully extend to the supply rails. Nevertheless, it is often possible to operate the AD734 with one terminal of an input pair con- nected to either the positive or negative supply, unlike previous multipliers. The common-mode resistance is several megohms. The full-scale output of ±10 V can be delivered to a load resistance of 1 kΩ (although the specifications apply to the standard multi- plier load condition of 2 kΩ). The output amplifier is stable, driving capacitive loads of at least 100 pF, when a slight increase in bandwidth results from the peaking caused by this capacitance. The 450 V/μs slew rate of the AD734 output amplifier ensures that the bandwidth of 10 MHz can be maintained up to the full output of 20 V p-p. Operation at reduced supply voltages is possible, down to ±8 V, with reduced signal levels. AVAILABLE TRANSFER FUNCTIONS The uncommitted (open-loop) transfer function of the AD734 is ( )( ) ( ⎭ ⎬ ⎫ ⎩ ⎨ ⎧ − − − − = 2 1 2 1 2 1 O Z Z U Y Y X X A W ) (1) where AO is the open-loop gain of the output op amp, typically 72 dB. When a negative feedback path is provided, the circuit forces the quantity inside the brackets essentially to zero, resulting in the equation (X1 − X2)(Y1 − Y2) = U (Z1 − Z2) (2) This is the most useful generalized transfer function for the AD734; it expresses a balance between the product XY and the product UZ. The absence of the output, W, in this equation only reflects the fact that the input to be connected to the op amp output is not specified. |
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