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ADF4350 Scheda tecnica(PDF) 1 Page - Analog Devices

Il numero della parte ADF4350
Spiegazioni elettronici  Minimizing Spurious Outputs Using a Synthesizer with an Integrated VCO and an External PLL Circuit
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

ADF4350 Scheda tecnica(HTML) 1 Page - Analog Devices

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Circuit Note
CN-0232
Circuits from the Lab™ reference circuits are engineered and
tested for quick and easysystemintegrationto helpsolve today’s
analog, mixed-signal, and RF design challenges. For more
informationand/orsupport,visitwww.analog.com/CN0232.
Devices Connected/Referenced
ADF4350
Fractional-N PLL Synthesizer with
Integrated VCO
ADF4153
Fractional-N PLL Frequency Synthesizer
Minimizing Spurious Outputs Using a Synthesizer with an Integrated VCO and
an External PLL Circuit
Rev. 0
Circuitsfromthe Lab™circuitsfromAnalog Deviceshave been designedandbuiltbyAnalogDevices
engineers. Standard engineering practices have been employed in the design and construction of
eachcircuit,andtheirfunctionandperformancehavebeentestedandverifiedinalabenvironmentat
room temperature. However, you are solely responsible for testing the circuit and determining its
suitabilityandapplicabilityforyouruseandapplication.Accordingly,innoeventshallAnalogDevices
be liable for direct, indirect, special, incidental, consequential or punitive damages due to any cause
whatsoeverconnectedtotheuseofanyCircuitsfromtheLabcircuits. (Continuedonlastpage)
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2012 Analog Devices, Inc. All rights reserved.
EVALUATION AND DESIGN SUPPORT
Circuit Evaluation Boards
ADF4350 Evaluation Board (EVAL-ADF4350EB2Z)
ADF4153 Evaluation Board (EVAL-ADF4153EBZ1)
Design and Integration Files
Schematics, Layout Files, Bill of Materials
CIRCUIT FUNCTION AND BENEFITS
The circuit shown in Figure 1 uses the ADF4350 synthesizer with
an integrated VCO and an external PLL to minimize spurious
outputs by isolating the PLL synthesizer circuitry from the VCO
circuit.
22nF
4.7nF
100nF
360Ω
200Ω
ADF4153
CPGND
DGND
CP
1nF
1nF
4.7kΩ
RSET
LE
DATA
CLK
REFIN
DVDD
MUXOUT
VDD
SDVDD
VP
100pF
100pF
AVDD
AGND
ADF4350
VVCO
VVCO
VVCO
VVCO
VTUNE
CPOUT
RFOUTB+
RFOUTB–
RFOUTA–
RFOUTA+
VDD
CPGND
AGND
DGND
4.7kΩ
RSET
LE
DATA
CLK
REFIN
MUXOUT
LOCK
DETECT
51Ω
AGNDVCO
LD
SDGND
TEMP
VREF
VCOM
SW
10pF
0.1µF
1nF
1nF
1nF
1nF
TCXO
26MHz
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
51Ω
RFOUTA+
VCO
COUNTERS
PHASE
FREQUENCY
DETECTOR
CHARGE
PUMP
COUNTERS
PHASE
FREQUENCY
DETECTOR
CHARGE
PUMP
RFOUTB+
VCO
TUNING
VOLTAGE
REFERENCE
LOOP FILTER
RF IN
3.3V
3.3V
3.3V
51Ω
10pF
0.1µF 10pF
0.1µF
1nF
1nF
8
11
12
13
1
2
3
1
29
RFINA
RFINB
15
3
4
9
6
5
14
7
2
16
10
10
28
16
8
31
9
11
18
21
27
14
15
19
23
24
25
30
17
20
7
26
6
32
5
4
12
13
22
Figure 1. ADF4153 PLL Connected to ADF4350 (Simplified Schematic: All Connections and Decoupling Not Shown)


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