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ADF4350 Scheda tecnica(PDF) 2 Page - Analog Devices |
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ADF4350 Scheda tecnica(HTML) 2 Page - Analog Devices |
2 / 4 page CN-0147 Circuit Note Rev. C | Page 2 of 4 Figure 2. EVAL-ADF4350EB1Z Rev. B Evaluation Board Featuring ADP150 Low Noise Regulators The lower integrated rms noise of the ADP150 LDO of only 9 µV rms (10 Hz to 100 kHz) helps to minimize VCO phase noise and reduce the impact of VCO pushing (the VCO equivalent of power supply rejection). Figure 2 shows a photo of the evaluation board, which uses the ADP150 LDOs to power the ADF4350. The ADP150 represents the industry’s lowest noise LDO in the smallest package at the lowest cost. It is available in a 4-ball, 0.8 mm × 0.8 mm, 0.4 mm pitch WLCSP or a convenient 5-lead TSOT package. Adding the ADP150’s to the design, therefore, has minimal impact on system cost and board area while providing a significant improvement in phase noise. CIRCUIT DESCRIPTION The ADF4350 is a wideband PLL and VCO consisting of three separate multiband VCOs. Each VCO covers a range of approximately 700 MHz (with some overlap between VCOs). Lower frequencies are generated by output dividers. VCO pushing is measured by applying a steady dc tuning voltage to the ADF4350 VTUNE pin, varying the power supply voltage, and measuring the frequency change. The pushing figure (P) equals the frequency delta divided by the voltage delta, as shown in Table 1. In a PLL system, higher VCO pushing means that power supply noise will degrade the VCO phase noise. If VCO pushing is low, then power supply noise will not significantly degrade phase noise. However, for high VCO pushing, noisy power supplies will have a measurable impact on phase noise performance. Table 1. ADF4350 VCO Pushing VCO Frequency (MHz) VTUNE (V) VCO Pushing (MHz/V) 2200 2.5 0.73 3300 2.5 1.79 4400 2.5 5.99 SPECTRUM ANALYZER [R&S FSUP 26] POWER SUPPLY EVAL-ADF4350EB1Z REV B BOARD 5.5V RF OUT PC USB CABLE Figure 3. ADF4350 Measurement Setup Experiments showed pushing to be at its maximum at 4.4 GHz VCO output frequency, so the comparison of VCO performance with different regulators was made at this frequency. Rev. A evaluation boards of the ADF4350 used the ADP3334 LDO regulator. The integrated rms noise of this regulator is 27 µV (integrated from 10 Hz to 100 kHz). This compares to 9 µV for the ADP150, which is used on the EVAL-ADF4350EB1Z, Rev B. In order to measure the impact of the power supply noise, a narrow PLL loop bandwidth (10 kHz) was used to facilitate greater examination of VCO phase noise. A diagram of this setup is shown in Figure 3. A more detailed examination of the output noise density with frequency is available from the data sheets of both the ADP3334 and ADP150. Figure 4 shows that the noise spectral density of the ADP3334 regulator is 150 nV/√Hz at 100 kHz offset. The same plot for the ADP150 (Figure 5) shows 25 nV/√Hz. The formula for calculating the degradation in phase noise due to the power supply noise is as follows: × × = fm Sfm P L(LDO) 2 log 20 Where L(LDO)is the noise contribution from the regulator to the VCO phase noise (in dBc/Hz), at an offset fm; P is the VCO pushing figure in Hz/V; Sfm is the noise spectral density at a given frequency offset in V/√Hz; and fm is the frequency offset at which the noise spectral density is measured in Hz. |
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