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ILC5061M32X Scheda tecnica(PDF) 3 Page - Fairchild Semiconductor |
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ILC5061M32X Scheda tecnica(HTML) 3 Page - Fairchild Semiconductor |
3 / 8 page Rev. 2.5 1/2/03 3 PRODUCT SPECIFICATION ILC5061 Functional Description 6 5 4 3 1 2 INPUT VOLTAGE (VIN) DETECT RELEASE VOLTAGE (VDR) DETECT FAIL VOLTAGE (VDF) MINIMUM OPERATING VOLTAGE (VMIN) GROUND VOLTAGE (VSS) OUTPUT VOLTAGE (VOUT) GROUND VOLTAGE (VSS) The following designators 1~6 refer to the timing diagram below. 1. While the input voltage (VIN) is higher than the detect voltage (VDF), the VOUT output pin is at high impedance state. 2. When the input VIN voltage falls lower than VDF, VOUT drops near to ground voltage 3. If the input voltage further decreases below the minimum operating voltage (VMIN), the VOUT output becomes unstable. In this condition, if the VOUT pin is pulled up, VOUT indicates the VIN voltage. 4. During an increase of the input voltage from the VSS voltage, VOUT is not stable in the voltage below the VMIN. Exceeding that level, the output stays at the ground level (VSS) between the minimum operating voltage (VMIN) and the detect release voltage (VDR). 5. If the input voltage increases more than VDR, then the VOUT output pin is at high impedance state. 6. The difference between VDR and VDF is the hysteresis in the system. |
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