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AD1671AP Scheda tecnica(PDF) 2 Page - Analog Devices |
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AD1671AP Scheda tecnica(HTML) 2 Page - Analog Devices |
2 / 16 page DC SPECIFICATIONS AD1671J/A/S AD1671K Parameter Min Typ Max Min Typ Max Units RESOLUTION 12 12 Bits CONVERSION TIME 800 800 ns ACCURACY Integral Nonlinearity (INL) ±1.5 ±2.5 ±0.7 ±2.5 LSB (S Grade) ±3.0 Differential Nonlinearity (DNL) 11 12 Bits No Missing Codes 11 Bits Guaranteed 12 Bits Guaranteed Unipolar Offsets 1 (+25 °C) ±9 ±9 LSB Bipolar Zero 1 (+25 °C) ±10 ±10 LSB Gain Error 1, 2 (+25 °C) 0.1 0.35 0.1 0.35 % FSR TEMPERATURE COEFFICIENTS 3 Unipolar Offset ±25 ±25 ppm/ °C (S Grade) ±25 Bipolar Zero ±25 ±25 ppm/ °C (S Grade) ±30 Gain Error 3 ±30 ±30 ppm/ °C (S Grade) ±40 Gain Error 4 ±20 ±20 ppm/ °C POWER SUPPLY REJECTION 5 VCC (+5 V ± 0.25 V) ±4 ±4 LSB (S Grade) ±5 VLOGIC (+5 V ± 0.25 V) ±4 ±4 LSB (S Grade) ±5 VEE (–5 V ± 0.25 V) ±4 ±4 LSB (S Grade) ±5 ANALOG INPUT Input Ranges Bipolar –2.5 +2.5 –2.5 +2.5 Volts –5.0 +5.0 –5.0 +5.0 Volts Unipolar 0 +2.5 0 +2.5 Volts 0 +5.0 0 +5.0 Volts Input Resistance (0 V to +2.5 V or ±2.5 V Range) 10 10 M Ω (0 V to +5.0 V or ±5 V Range) 8 10 12 8 10 12 k Ω Input Capacitance 10 10 pF Aperture Delay 15 15 ns Aperture Jitter 20 20 ps INTERNAL VOLTAGE REFERENCE Output Voltage 2.475 2.5 2.525 2.475 2.5 2.525 Volts Output Current Unipolar Mode +2.5 +2.5 mA Bipolar Mode +1.0 +1.0 mA LOGIC INPUTS High Level Input Voltage, VIH 2.0 2.0 Volts Low Level Input Voltage, VIL 0.8 0.8 Volts High Level Input Current, IIH (VIN = VLOGIC) –10 +10 –10 +10 µA Low Level Input Current, ILL (VIN = 0 V) –10 +10 –10 +10 µA Input Capacitance, CIN 55 pF LOGIC OUTPUTS High Level Output Voltage, VOH (IOH = 0.5 mA) 2.4 2.4 Volts Low Level Output Voltage, VOL (IOL = 1.6 mA) 0.4 0.4 Volts POWER SUPPLIES Operating Voltages VCC +4.75 +5.25 +4.75 +5.25 Volts VLOGIC +4.5 +5.5 +4.5 +5.5 Volts VEE –4.75 –5.25 –4.75 –5.25 Volts Operating Current ICC 55 68 55 68 mA ILOGIC 6 35 3 5 mA IEE –55 –68 –55 –68 mA POWER CONSUMPTION 570 750 570 750 mW TEMPERATURE RANGE (SPECIFIED) J/K 0 +70 0 +70 °C A –40 +85 –40 +85 °C S –55 +125 –55 +125 °C NOTES 1Adjustable to zero with external potentiometers. 2Includes internal voltage reference error. 3+25 °C to T MIN and +25°C to TMAX 4Excludes internal reference drift. 5Change in gain error as a function of the dc supply voltage. 6Tested under static conditions. See Figure 15 for typical curve of I LOGIC vs. load capacitance at maximum tC. Specifications subject to change without notice. (TMIN to TMAX with VCC = +5 V 5%, VLOGIC = +5 V 10%, VEE = –5 V 5%, unless otherwise noted) AD1671–SPECIFICATIONS REV. B –2– |
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