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FAN5093MTC Scheda tecnica(PDF) 4 Page - Fairchild Semiconductor |
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FAN5093MTC Scheda tecnica(HTML) 4 Page - Fairchild Semiconductor |
4 / 17 page FAN5093 PRODUCT SPECIFICATION 4 REV. 1.1.0 3/27/03 Electrical Specifications (VCC = 12V, VID = [01111] = 1.475V, and TA = +25°C using circuit in Figure 2, unless otherwise noted.) The • denotes specifications which apply over the full operating temperature range. Notes: 1. As measured at the converter’s VFB sense point. For motherboard applications, the PCB layout should exhibit no more than 0.5m Ω trace resistance between the converter’s output capacitors and the CPU. Remote sensing should be used for optimal performance. 2. Using the VFB pin for remote sensing of the converter’s output at the load, the converter will be in compliance with VRM 9.x specification. Parameter Conditions Min. Typ. Max. Units Input Supply UVLO Hysteresis 0.5 V 12V UVLO Rising Edge • 8.5 9.5 10.3 V 12V Supply Current PWM Output Open 20 mA Internal Voltage Regulator BYPASS Voltage 4.75 5 5.25 V BYPASS Capacitor 100 nF VREF and DAC Output Voltage See Table 1 • 1.100 1.850 V Initial Voltage Setpoint1 ILOAD = 0A, VID = [01111] 1.460 1.475 1.490 V Output Temperature Drift TA = 0 to 70°C 5 mV Line Regulation VCC = 11.4V to 12.6V • 130 µV Droop2 ILOAD = 69A, RDROOP = 13.3k Ω 56 mV Programmable Droop Range 0 1.25 m Ω Response Time ∆Vout = 10mV 100 nsec Current Mismatch RDS,on (A) = RDS,on (B), ILOAD = 69A, Droop = 1m Ω 5% VID Inputs Input LOW current, VID pins VVID = 0.4V -60 µA VID VIH 2.0 V VID VIL 0.8 V Oscillator Oscillator Frequency RT = 54.9k Ω • 440 500 560 kHz Oscillator Range RT = 137.5k Ω to 13.75 kΩ 200 2000 kHz Maximum Duty Cycle RT = 137.5k Ω 90 % Minimum LDRV on-time RT = 13.75k Ω 330 nsec Gate Drive Gate Drive On-Resistance Sink & Source 1.0 Ω Output Driver Rise & Fall Time See Figure 1, CL = 3000pF 20 nsec Enable/Soft Start Soft Start Current 10 µA Enable Threshold ON OFF 1.0 0.4 V Power Good PWRGD Threshold Logic LOW, VVID – VPWRGD • 85 88 92 %VOUT PWRGD Output Voltage Isink = 4mA 0.4 V PWRGD Delay High → Low 500 µsec OVP and OTP Output Overvoltage Detect • 2.1 2.2 2.3 V Over Temperature Shutdown 130 140 150 °C Over Temperature Hysteresis 40 °C |
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