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FST3253MTC Scheda tecnica(PDF) 3 Page - Fairchild Semiconductor |
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FST3253MTC Scheda tecnica(HTML) 3 Page - Fairchild Semiconductor |
3 / 5 page 3 www.fairchildsemi.com AC Electrical Characteristics Note 6: This parameter is guaranteed by design but is not tested. The bus switch contributes no propagation delay other than the RC delay of the typical On resistance of the switch and the 50pF load capacitance, when driven by an ideal voltage the source (zero output impedance). Capacitance (Note 7) Note 7: TA = +25°C, f = 1 MHz, Capacitance is characterized but not tested. AC Loading and Waveforms Note: Input driven by 50 Ω source terminated in 50 Ω Note: CL includes load and stray capacitance Note: Input PRR = 1.0 MHz, t W = 500 ns FIGURE 1. AC Test Circuit FIGURE 2. AC Waveforms Symbol Parameter TA = −40 °C to +85 °C CL = 50pF, RU = RD = 500Ω Units Conditions Figure No. VCC = 4.5 – 5.5V VCC = 4.0V Min Max Min Max tPHL,tPLH Prop Delay Bus to Bus (Note 6) 0.25 0.25 ns VI = OPEN Figure 1 Figure 2 Prop Delay, Select to Bus A 1.0 5.3 6.3 tPZH, tPZL Output Enable Time, Select to Bus B 1.0 5.3 6.0 ns VI = 7V for tPZL Figure 1 Figure 2 Output Enable Time, IOE to Bus A, B 1.0 5.3 6.2 VI = OPEN for tPZH tPHZ, tPLZ Output Disable Time., Select to Bus B 1.0 5.8 6.2 ns VI = 7V for tPLZ Figure 1 Figure 2 Output Disable Time, IOE to Bus A, B 1.0 5.5 6.2 VI = OPEN for tPHZ Symbol Parameter Typ Max Units Conditions CIN Control Pin Input Capacitance 3 pF VCC = 5.0V CI/O A Port Input/Output Capacitance 13 pF VCC, OE = 5.0V B Port 5 pF |
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