SI5326C-C-GM datasheet(5/72 Pages) SILABS

Il numero della parte	SI5326C-C-GM

Spiegazioni elettronici	ANY FREQUENCY PRECISION CLOCK MULTIPLIER/JITTER ATTENUATOR

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Si5326

Rev. 1.0

5

Table 2. DC Characteristics

(VDD = 1.8 ± 5%, 2.5 ±10%, or 3.3 V ±10%, TA = –40 to 85 °C)

Parameter

Symbol

Test Condition

Min

Typ

Max

Unit

Supply Current1

IDD

LVPECL Format

622.08 MHz Out

Both CKOUTs Enabled

—251

279

mA

LVPECL Format

622.08 MHz Out

1 CKOUT Enabled

—217

243

mA

CMOS Format

19.44 MHz Out

Both CKOUTs Enabled

—204

234

mA

CMOS Format

19.44 MHz Out

1 CKOUT Enabled

—194

220

mA

Disable Mode

—

165

—

mA

CKINn Input Pins2

Input Common Mode

Voltage (Input Thresh-

old Voltage)

VICM

1.8 V ± 5%

0.9

—

1.4

V

2.5 V ± 10%

1

—

1.7

V

3.3 V ± 10%

1.1

—

1.95

V

Input Resistance

CKNRIN

Single-ended

20

40

60

kΩ

Single-Ended Input

Voltage Swing

(See Absolute Specs)

VISE

fCKIN < 212.5 MHz

See Figure 1.

0.2

—

VPP

fCKIN > 212.5 MHz

See Figure 1.

0.25

—

VPP

Differential Input

Voltage Swing

(See Absolute Specs)

VID

fCKIN < 212.5 MHz

See Figure 1.

0.2

—

VPP

fCKIN > 212.5 MHz

See Figure 1.

0.25

—

VPP

Output Clocks (CKOUTn)3

Common Mode

CKOVCM

LVPECL 100

 load line-

to-line

VDD –

1.42

—VDD –1.25

V

Notes:

1.

Current draw is independent of supply voltage

2.

No under- or overshoot is allowed.

3.

LVPECL outputs require nominal VDD ≥ 2.5 V.

4.

This is the amount of leakage that the 3-Level inputs can tolerate from an external driver. See Si53xx

Family Reference Manual for more details.

5.

LVPECL, CML, LVDS and low-swing LVDS measured with Fo = 622.08 MHz.

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