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74LVC1G14GW.125 Scheda tecnica(PDF) 9 Page - NXP Semiconductors

Il numero della parte 74LVC1G14GW.125
Spiegazioni elettronici  Single Schmitt-trigger inverter
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Produttore elettronici  NXP [NXP Semiconductors]
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74LVC1G14GW.125 Scheda tecnica(HTML) 9 Page - NXP Semiconductors

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74LVC1G14
All information provided in this document is subject to legal disclaimers.
© NXP B.V. 2012. All rights reserved.
Product data sheet
Rev. 12 — 6 August 2012
9 of 20
NXP Semiconductors
74LVC1G14
Single Schmitt-trigger inverter
15. Application information
The slow input rise and fall times cause additional power dissipation, this can be
calculated using the following formula:
Padd =fi  (tr ICC(AV) +tf ICC(AV))  VCC where:
Padd = additional power dissipation (W);
fi = input frequency (MHz);
tr = input rise time (ns); 10 % to 90 %;
tf = input fall time (ns); 90 % to 10 %;
I
CC(AV) = average additional supply current (A).
Average
I
CC(AV) differs with positive or negative input transitions, as shown in Figure 13.
An example of a relaxation circuit using the 74LVC1G14 is shown in Figure 14.
Linear change of VI between 0.8 V to 2.0 V.
All values given are typical unless otherwise specified.
Fig 13. Average additional supply current as a function of supply voltage
02
6
12
0
8
6
4
2
10
mna642
4
VCC (V)
average
ICC
(mA)
negative-going
edge
positive-going
edge
Fig 14. Relaxation oscillator
mna035
R
C
f
1
T
---
1
0.5
RC
---------------------
=


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