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FQPF3P50 Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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FQPF3P50 Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
1 / 8 page ©2000 Fairchild Semiconductor International August 2000 Rev. A, August 2000 QFET QFET QFET QFETTM FQPF3P50 500V P-Channel MOSFET General Description These P-Channel enhancement mode power field effect transistors are produced using Fairchild’s proprietary, planar stripe, DMOS technology. This advanced technology has been especially tailored to minimize on-state resistance, provide superior switching performance, and withstand high energy pulse in the avalanche and commutation mode. These devices are well suited for electronic lamp ballast based on complimentary half bridge. Features • -1.9A, -500V, RDS(on) = 4.9Ω @VGS = -10 V • Low gate charge ( typical 18 nC) • Low Crss ( typical 9.5 pF) • Fast switching • 100% avalanche tested • Improved dv/dt capability Absolute Maximum Ratings T C = 25°C unless otherwise noted Thermal Characteristics Symbol Parameter FQPF3P50 Units VDSS Drain-Source Voltage -500 V ID Drain Current - Continuous (TC = 25°C) -1.9 A - Continuous (TC = 100°C) -1.2 A IDM Drain Current - Pulsed (Note 1) -7.6 A VGSS Gate-Source Voltage ± 30 V EAS Single Pulsed Avalanche Energy (Note 2) 250 mJ IAR Avalanche Current (Note 1) -1.9 A EAR Repetitive Avalanche Energy (Note 1) 3.9 mJ dv/dt Peak Diode Recovery dv/dt (Note 3) -4.5 V/ns PD Power Dissipation (TC = 25°C) 39 W - Derate above 25°C 0.31 W/°C TJ, TSTG Operating and Storage Temperature Range -55 to +150 °C TL Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds 300 °C Symbol Parameter Typ Max Units RθJC Thermal Resistance, Junction-to-Case -- 3.2 °C/W RθJA Thermal Resistance, Junction-to-Ambient -- 62.5 °C/W ● ● ● ● ● ● ● ● ● ● ● ● ▲ ▲ ▲ ▲ ▶ ▶ ▶ ▶ ! ! ! ! ! ! ! ! ! ! ! ! ● ● ● ● ● ● ● ● ● ● ● ● ▲ ▲ ▲ ▲ ▶ ▶ ▶ ▶ ! ! ! ! ! ! ! ! ! ! ! ! S D G TO-220F FQPF Series G S D |
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