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TDA8034HN-C1,151 Scheda tecnica(PDF) 5 Page - NXP Semiconductors |
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TDA8034HN-C1,151 Scheda tecnica(HTML) 5 Page - NXP Semiconductors |
5 / 30 page TDA8034HN All information provided in this document is subject to legal disclaimers. © NXP B.V. 2011. All rights reserved. Product data sheet Rev. 3.1. — 5 September 2011 5 of 30 NXP Semiconductors TDA8034HN Smart card interface [1] I = input, O = output, I/O = input/output, G = ground and P = power supply. [2] If pin PRESN is LOW, the card is considered to be present. During card insertion, debouncing can occur on these signals. To counter this, the TDA8034HN has a built-in debouncing timer (typically 8 ms). [3] Uses an internal 11 k pull-up resistor connected to pin V CC. [4] Uses an internal 20 k pull-up resistor connected to pin V DD(INTF). [5] Uses an internal 10k pull-up resistor connected to pin V DD(INTF) 8. Functional description Remark: Throughout this document the ISO 7816 terminology conventions have been adhered to and it is assumed that the reader is familiar with these. 8.1 Power supplies The power supply voltage ranges are as follows: • VDDP: 4.85 V to 5.5 V when VCC_SEL2 is HIGH (VCC = 5 V) • VDDP: 3 V to 5.5 V when VCC_SEL2 is LOW (VCC = 3 V) or when VCC_SEL1 is LOW (VCC = 1.8 V) • VDD: 2.7 V to 3.6 V All interface signals to the system controller are referenced to VDD(INTF). All card contacts remain inactive during power up or power down. After powering up the device, pin OFFN remains LOW until pin CMDVCCN is set HIGH and pin PRESN is LOW. During power down, pin OFFN goes LOW when VDDP falls below the falling threshold voltage (Vth). The internal oscillator frequency (fosc(int)) is only used during the activation sequences. When the card is not activated (pin CMDVCCN is HIGH), the internal oscillator is in low frequency mode to reduce power consumption. This device has a Low Drop-Off (LDO) voltage regulator connected to pin VCC, and is used instead of a DC-to-DC converter. It ensures a minimum VCC of 4.75 V and that the power supply voltage on pin VDDP does not fall below 4.85 V when pin VCC_SEL2 is HIGH, for a maximum load current of 65 mA. VDDP 16 VDDP P low-dropout regulator input supply voltage VDD 17 VDD P digital supply voltage PORADJ 18 VDD(INTF) I power-on reset threshold adjustment input using an optional external resistor bridge OFFN 19 VDD(INTF) O NMOS interrupt to microcontroller[4]; active LOW; see Section 8.10 on page 11 I/OUC 20 VDD(INTF) I/O microcontroller input/output data line[5] AUX1UC 21 VDD(INTF) I/O auxiliary microcontroller input/output data line[5] AUX2UC 22 VDD(INTF) I/O auxiliary microcontroller input/output data line[5] XTAL1 23 VDD I crystal connection input XTAL2 24 VDD O crystal connection output Table 3. Pin description …continued Symbol Pin Supply Type[1] Description |
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