10

www.fairchildsemi.com

FM34W02U Rev. A.1

S

T

O

P

A

C

K

SLAVE

ADDRESS

A

C

K

A

C

K

S

T

A

R

T

S

T

A

R

T

BYTE

ADDRESS

SLAVE

ADDRESS

Bus Activity:

Master

SDA Line

DATA n

S

T

O

P

A

C

K

Bus Activity:

Master

SDA Line

A

C

K

DATA n + x

A

C

K

DATA n + 2

DATA n +1

DATA n

A

C

K

SLAVE

ADDRESS

S

T

O

P

DATA

A

C

K

S

T

A

R

T

SLAVE

ADDRESS

Bus Activity:

Master

SDA Line

SDA

SCL

Master

Transmitter/

Receiver

Slave

Transmitter/

Receiver

Master

Transmitter

Slave

Receiver

Master

Transmitter/

Receiver

VCC

Current Address Read (Figure 8)

Random Read (Figure 9)

Sequential Read (Figure 10)

Note:

Due to open drain configuration of SDA, a bus-level resistor is called for

(Typical value = 4.7

Ω)

Typical System Configuration (Figure 11)