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FM25C041 Scheda tecnica(PDF) 5 Page - Fairchild Semiconductor |
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FM25C041 Scheda tecnica(HTML) 5 Page - Fairchild Semiconductor |
5 / 11 page 5 www.fairchildsemi.com FM25C041U Rev. B FIGURE 1. Synchronous Data Timing Diagram SCK CS SO HOLD Output (n+1) Output (n) Output (n) Output (n+2) tHDS tHZ tLZ tHDH tHDS tHDH tDIS High Z SI Input (n+1) Input (n) Input (n) Input (n+2) Don't Care Low state ( /CS = 0) Don't Care FIGURE 3. HOLD Timing FIGURE 2. SPI Protocol SCK SI SO CS Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Don't Care High Z Mode 2 Mode 1 tCSS tCLH tCLL tCSH tDF tPD tDIS tDIH tDH tCSI SCK SI SO CS Valid Input Valid Output High Z Mode 2 Mode 2 Mode 1 Mode 1 |
Codice articolo simile - FM25C041 |
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Descrizione simile - FM25C041 |
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