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UC3527A Scheda tecnica(PDF) 9 Page - Texas Instruments |
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UC3527A Scheda tecnica(HTML) 9 Page - Texas Instruments |
9 / 17 page www.ti.com Shutdown Options (See Block Diagram) RD = 0 CT = .01 µF CT = .02 µF CT = .05 µF CT = 0.1 µF CT = 1 nF CT = 5 nF CT = 2 nF 6 5 7 RT RD CT 200 100 50 20 10 5 2 1 2 5 10 20 50 100 200 1ms 2ms 5ms10ms Charge Time − ms 500 400 300 200 100 0 0.2 0.5 1 2 5 10 20 50 100 200 Charge Time − ms CT = 1 nF CT = 2 nF CT = 5 nF CT = .01 µF CT = .05 µF CT = 0.1 µF CT = .02 µF 125 °C 25 °C −55 °C Max RD For a Given RT, Min RT For a Given RD 500 400 300 200 100 0 2 4 6 8 10 12 Minimum Recommended RT − kW RL = ∞ RL = 1 MΩ RL = 300 kΩ RL = 100 kΩ RL = 30 kΩ Voltage Gain Phase 80 60 40 20 0 100 1 k 10 k 100 k 1 M 10 M f − Frequency − Hz −360 ° −270 ° −180 ° VIN = 20 V, TJ = 25°C UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A SLUS191C – FEBRUARY 1997 – REVISED JANUARY 2008 PRINCIPLES OF OPERATION AND TYPICAL CHARACTERISTICS (continued) Since both the compensation and soft-start terminals (Pins 9 and 8) have current source pull-ups, either can readily accept a pull-down signal which only has to sink a maximum of 100 A to turn off the outputs. This is subject to the added requirement of discharging whatever external capacitance may be attached to these pins. An alternate approach is the use of the shutdown circuitry of Pin 10 which has been improved to enhance the available shutdown options. Activating this circuit by applying a positive signal on Pin 10 performs two functions; the PWM latch is immediately set providing the fastest turn-off signal to the outputs; and a 150-A current sink begins to discharge the external soft-start capacitor. If the shutdown command is short, the PWM signal is terminated without significant discharge of the soft-start capacitor, thus, allowing, for example, a convenient implementation of pulse-by-pulse current limiting. Holding Pin 10 high for a longer duration, however, will ultimately discharge this external capacitor, recycling slow turn-on upon release. Pin 10 should not be left floating as noise pickup could conceivably interrupt normal operation. All transitions of the voltage on pin 10 should be within the time frame of one clock cycle and not repeated at a frequency higher than 10 clock cycles. Oscillator Charge Time vs RT and CT Oscillator Discharge Time vs RT CT Figure 8. Figure 9. Maximum Value RD vs Minimum Value RT Error Amplifier Voltage Gain and Phase vs Frequency Figure 10. Figure 11. Copyright © 1997–2008, Texas Instruments Incorporated Submit Documentation Feedback 9 Product Folder Link(s): UC1525A, UC1527A UC2525A, UC2527A UC3525A, UC3527A |
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