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AD9272BSVZ-651 Scheda tecnica(PDF) 7 Page - Analog Devices |
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AD9272BSVZ-651 Scheda tecnica(HTML) 7 Page - Analog Devices |
7 / 44 page AD9272 Rev. C | Page 7 of 44 AD9272-40 AD9272-65 AD9272-80 Parameter1 Conditions Min Typ Max Min Typ Max Min Typ Max Unit IAVDD1 Full-channel mode 210 280 335 mA CW Doppler mode with four channels enabled 32 32 32 mA IAVDD2 Full-channel mode 365 365 365 mA CW Doppler mode with four channels enabled 140 140 140 mA IDRVDD 49 51 52 mA Total Power Dissipation Includes output drivers, full- channel mode, no signal 1560 1713 1690 1860 1780 1975 mW CW Doppler mode with four channels enabled 475 475 475 mW Power-Down Dissipation 5 5 5 mW Standby Power Dissipation 175 200 210 mW Power Supply Rejection Ratio (PSRR) 1.6 1.6 1.6 mV/V ADC RESOLUTION 12 12 12 Bits ADC REFERENCE Output Voltage Error VREF = 1 V ±20 ±20 ±20 mV Load Regulation At 1.0 mA, VREF = 1 V 2 2 2 mV Input Resistance 6 6 6 kΩ 1 See the AN-835 Application Note, Understanding High Speed ADC Testing and Evaluation, for a complete set of definitions and information about how these tests were completed. 2 SE = single-ended. 3 AAF settings < 5 MHz are out of range and not supported. 4 The overrange condition is specified as being 6 dB more than the full-scale input range. |
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