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FDS6875 Scheda tecnica(PDF) 4 Page - Fairchild Semiconductor |
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FDS6875 Scheda tecnica(HTML) 4 Page - Fairchild Semiconductor |
4 / 8 page FDS6875 Rev.C Typical Electrical Characteristics (continued) Figure 10. Single Pulse Maximum Power Dissipation. Figure 8. Capacitance Characteristics. Figure 7. Gate Charge Characteristics. Figure 9. Maximum Safe Operating Area. Figure 11. Transient Thermal Response Curve. Thermal characterization performed using the conditions described in Note 1c. Transient thermal response will change depending on the circuit board design. 0 5 10 15 20 25 0 1 2 3 4 5 Q , GATE CHARGE (nC) g I = -6A D V = -5V DS -10V -15V 0.1 0.2 0.5 1 2 5 10 20 100 200 500 1000 2000 4000 - V , DRAIN TO SOURCE VOLTAGE (V) DS Ciss f = 1 MHz V = 0 V GS Coss Crss 0.1 0.3 1 2 5 10 30 0.01 0.05 0.5 3 10 30 - V , DRAIN-SOURCE VOLTAGE (V) RDS(ON) LIMIT DC DS 1s 100ms 10ms 1ms 10s V = -4.5V SINGLE PULSE R = 135° C/W T = 25° C θJA GS A 100us 0.01 0.1 0.5 10 50 100 300 0 5 10 15 20 25 30 SINGLE PULSE TIME (SEC) SINGLE PULSE R =135°C/W T = 25°C θJA A 0.0001 0.001 0.01 0.1 1 10 100 300 0.001 0.002 0.005 0.01 0.02 0.05 0.1 0.2 0.5 1 t , TIME (sec) 1 Single Pulse D = 0.5 0.1 0.05 0.02 0.01 0.2 Duty Cycle, D = t /t 1 2 R (t) = r(t) * R R = 135°C/W θJA θJA θJA T - T = P * R (t) θJA A J P(pk) t1 t 2 |
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