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FDS2170N7 Scheda tecnica(PDF) 2 Page - Fairchild Semiconductor |
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FDS2170N7 Scheda tecnica(HTML) 2 Page - Fairchild Semiconductor |
2 / 6 page FDS2170N7 Rev C3(W) Electrical Characteristics T A = 25°C unless otherwise noted Symbol Parameter Test Conditions Min Typ Max Units Drain-Source Avalanche Ratings WDSS Drain-Source Avalanche Energy Single Pulse, VDD = 100 V, ID=3.0 A 370 mJ IAR Drain-Source Avalanche Current 3 A Off Characteristics BVDSS Drain–Source Breakdown Voltage VGS = 0 V, ID = 250 µA 200 V ∆BVDSS ∆TJ Breakdown Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C 231 mV/ °C IDSS Zero Gate Voltage Drain Current VDS = 160 V, VGS = 0 V 1 µA IGSSF Gate–Body Leakage, Forward VGS = 20 V, VDS = 0 V 100 nA IGSSR Gate–Body Leakage, Reverse VGS = –20 V, VDS = 0 V –100 nA On Characteristics (Note 2) VGS(th) Gate Threshold Voltage VDS = VGS, ID = 250 µA 2 4 4.5 V ∆VGS(th) ∆TJ Gate Threshold Voltage Temperature Coefficient ID = 250 µA, Referenced to 25°C –10 mV/ °C RDS(on) Static Drain–Source On–Resistance VGS = 10 V, ID = 3.0 A VGS = 10 V, ID = 3.0 A,TJ = 125°C 107 213 128 268 m Ω gFS Forward Transconductance VDS = 10 V, ID = 3.0 A 15 S Dynamic Characteristics Ciss Input Capacitance 1292 pF Coss Output Capacitance 72 pF Crss Reverse Transfer Capacitance VDS = 100 V, V GS = 0 V, f = 1.0 MHz 24 pF RG Gate Resistance VGS = 15 mV, f = 1.0 MHz 1.5 Ω Switching Characteristics (Note 2) td(on) Turn–On Delay Time 12 22 ns tr Turn–On Rise Time 5 10 ns td(off) Turn–Off Delay Time 30 48 ns tf Turn–Off Fall Time VDD = 100 V, ID = 1 A, VGS = 10 V, RGEN = 6 Ω 23 36 ns Qg Total Gate Charge 26 36 nC Qgs Gate–Source Charge 7 nC Qgd Gate–Drain Charge VDS = 100 V, ID = 3.0 A, VGS = 10 V 10 nC Drain–Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain–Source Diode Forward Current 2.5 A VSD Drain–Source Diode Forward Voltage VGS = 0 V, IS = 2.5 A (Note 2) 0.76 1.2 V trr Diode Reverse Recovery Time 95 nS Qrr Diode Reverse Recovery Charge IF = 3.0A diF/dt = 100 A/µs (Note 2) 552 nC Notes: 1. R θJA is the sum of the junction-to-case and case-to-ambient thermal resistance where the case thermal reference is defined as the solder mounting surface of the drain pins. R θJC is guaranteed by design while RθCA is determined by the user's board design. a) 40°C/W when mounted on a 1in 2 pad of 2 oz copper b) 85°C/W when mounted on a minimum pad of 2 oz copper Scale 1 : 1 on letter size paper 2. Pulse Test: Pulse Width < 300 µs, Duty Cycle < 2.0% |
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