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ISLA216P20 Scheda tecnica(PDF) 6 Page - Intersil Corporation |
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ISLA216P20 Scheda tecnica(HTML) 6 Page - Intersil Corporation |
6 / 25 page Application Note 1837 6 AN1837.0 May 3, 2013 of 5.6V/V yields a 5.7nV/√Hz differential spot noise. Combining this with the various noise elements within the ISLA214P50 will give a slight degradation in the resulting SNR in the FFT. Those calculations are described in this article: “Deliver the lowest distortion and noise in a low power, wideband, ADC interface – Part 2 of 4” http://www.planetanalog.com/document.asp?doc_id=528177 The second ADTL1-12 common mode choke transformer provides a very broadband, low insertion loss, element that forces balance in this differential signal path. Testing with and without this element showed a significant improvement in the FDA output 2nd harmonic distortion at higher frequencies. This is an optional element in the design and can be bypassed with the optional shorts, but the best SFDR will be achieved with this element included as it is in the standard board build. ELEMENTS CONTRIBUTING TO THE PASSBAND FLATNESS AND HIGHER FREQUENCY CUTOFF Each of the elements in the signal path have fine scale rolloffs that need to be considered to achieve the final ±0.8dB flatness through the 100kHz to 100MHz intended digitizer range for this example design board. The ADT4-6T input transformer was selected mainly for its low frequency performance. While specified as -1dB flat from 150kHz to 200MHz, typical devices measure to have a -1dB flatness span when driven from a 50Ω source to a 200Ω load of 40kHz to 180MHz. This far exceeds the Mini-Circuits specified flatness region on the low frequency side which is very typical for these wideband baluns. Figure 5 shows a comparison to measured and modeled transformer response with a 50Ω source to 200Ω load. Since there is limited data at low frequencies in the vendor data sheet, no comparison is made to that. The measured curve is showing about -0.5dB at 100kHz and -0.3dB at 100MHz. The Spice model (used in subsequent simulations) is only attempting to match the high and low F-3dB frequencies and the midband gain including the measured 0.2dB insertion loss. That modeling approach is described in this article: “Measuring and modeling wideband baluns for application to ADC input stages” http://www.planetanalog.com/author.asp?section_id=434&doc _id=558824& For a higher frequency range design, the MA/COM MABA-0096-CF48A0 measures in the same configuration to have a -0.5dB flatness span from 300kHz to 220MHz typically which would make it a good choice for 1MHz to 200MHz analog input span. The ADT1-12 common mode choke following this actually has 0dB insertion loss in this configuration at low frequencies. This increases to -0.2dB midband with a -1dB point at >1GHz with these higher 200Ω source and load impedances used at this point in the signal chain. The amplifier will have its own frequency response from these source impedances and gain settings. Having good simulation models for each of the elements in the design allow easy comparisons of options. Setting up an iSim PE circuit for the input stage of Figure 4 gives a simulation circuit of Figure 6. FIGURE 5. ADT4-6T RESPONSE CURVES 3.0 3.5 4.0 4.5 5.0 5.5 6.0 100k 1M 10M 100M 1G MEASURED MODELED FREQUENCY (Hz) FIGURE 6. SIMULATION CIRCUIT FOR THE INPUT STAGE PART OF THE ISLA214P50-55210EV1Z BOARD |
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Descrizione simile - ISLA216P20 |
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