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DM7438 Scheda tecnica(PDF) 1 Page - Fairchild Semiconductor |
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DM7438 Scheda tecnica(HTML) 1 Page - Fairchild Semiconductor |
1 / 5 page © 2001 Fairchild Semiconductor Corporation DS006513 www.fairchildsemi.com September 1986 Revised July 2001 DM7438 • 7438 Quad 2-Input NAND Buffers with Open-Collector Outputs General Description This device contains four independent gates each of which performs the logic NAND function. The open-collector out- puts require external pull-up resistors for proper logical operation. Pull-Up Resistor Equations Where: N1 (IOH) = total maximum output high current for all outputs tied to pull-up resistor N2 (IIH) = total maximum input high current for all inputs tied to pull-up resistor N3 (IIL) = total maximum input low current for all inputs tied to pull-up resistor Ordering Code: Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code. Connection Diagram Function Table Y = AB H = HIGH Logic Level L = LOW Logic Level Order Number Package Number Package Description DM7438M M14A 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow DM7438N N14A 14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide 7438SJ M14D 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide Inputs Output AB Y LL H LH H HL H HH L |
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