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74VHCT573 Scheda tecnica(PDF) 4 Page - Fairchild Semiconductor

Il numero della parte 74VHCT573
Spiegazioni elettronici  Octal D-Type Latch with 3-STATE Outputs
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Produttore elettronici  FAIRCHILD [Fairchild Semiconductor]
Homepage  http://www.fairchildsemi.com
Logo FAIRCHILD - Fairchild Semiconductor

74VHCT573 Scheda tecnica(HTML) 4 Page - Fairchild Semiconductor

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4
AC Electrical Characteristics
Note 8: Parameter guaranteed by design. tOSLH
|tPLH max  tPLH min|; tOSHL
|tPHL max  tPHL min|
Note 9: CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average
operating current can be obtained by the equation: ICC (opr.)
CPD * VCC * fIN  ICC/8 (per F/F). The total CPD when n pcs. of the Latch operates can be cal-
culated by the equation: CPD(total) 14  13n.
AC Operating Requirements
Symbol
Parameter
VCC
(V)
TA 25qCTA 40qC to 85qC
Units
Conditions
Min
Typ
Max
Min
Max
tPLH
Propagation Delay Time
5.0
r 0.5
7.7
12.3
1.0
13.5
ns
CL 15 pF
tPHL
(LE to On)
8.5
13.3
1.0
14.5
CL 50 pF
tPLH
Propagation Delay Time
5.0
r 0.5
5.1
8.5
1.0
9.5
ns
CL 15 pF
tPHL
(D to On)
5.9
9.5
1.0
10.5
CL 50 pF
tPZL
3-STATE Output
5.0
r 0.5
6.3
10.9
1.0
12.5
ns
RL 1 k: CL 15 pF
tPZH
Enable Time
7.1
11.9
1.0
13.5
CL 50 pF
tPLZ
3-STATE Output
5.0
r 0.5
8.8
11.2
1.0
12.0
ns
RL 1 k: CL 50 pF
tPHZ
Disable Time
tOSLH
Output to Output
5.0
r 0.5
1.0
1.0
ns
(Note 8)
tOSHL
Skew
CIN
Input Capacitance
4
10
10
pF
VCC Open
COUT
Output Capacitance
6
pF
VCC 5.0V
CPD
Power Dissipation
25
pF
(Note 9)
Capacitance
Symbol
Parameter
VCC
(V)
TA 25qCTA 40qC to 85qC
Units
Min
Typ
Max
Min
Max
tW(H)
Minimum Pulse Width (LE)
5.0
r 0.5
6.5
8.5
ns
tS
Minimum Setup Time
5.0
r 0.5
1.5
1.5
ns
tH
Minimum Hold Time
5.0
r 0.5
3.5
3.5
ns


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