© 2005 Fairchild Semiconductor Corporation

DS011505

www.fairchildsemi.com

October 1992

Revised February 2005

74VHC74

Dual D-Type Flip-Flop with Preset and Clear

General Description

The VHC74 is an advanced high speed CMOS Dual D-

Type Flip-Flop fabricated with silicon gate CMOS technol-

ogy. It achieves the high speed operation similar to equiva-

lent Bipolar Schottky TTL while maintaining the CMOS low

power dissipation. The signal level applied to the D input is

transferred to the Q output during the positive going transi-

tion of the CK pulse. CLR and PR are independent of the

CK and are accomplished by setting the appropriate input

LOW.

An input protection circuit ensures that 0V to 7V can be

applied to the input pins without regard to the supply volt-

age. This device can be used to interface 5V to 3V systems

and two supply systems such as battery backup. This cir-

cuit prevents device destruction due to mismatched supply

and input voltages.

Features

s Power down protection is provided on all inputs

s Pin and function compatible with 74HC74

Ordering Code:

Surface mount packages are also available on Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.

Pb-Free package per JEDED J-STD-020B.

Note 1: “_NL” indicates Pb-Free package (per JEDEC J-STD-020B). Device available in Tape and Reel only.

Order Number

Package

Package Description

Number

74VHC74M

M14A

14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHC74MX_NL

M14A

Pb-Free 14-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150" Narrow

74VHC74SJ

M14D

Pb-Free 14-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide

74VHC74MTC

MTC14

14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm Wide

74VHC74MTCX_NL

(Note 1)

MTC14

Pb-Free 14-Lead Thin Shrink Small Outline Package (TSSOP), JEDEC MO-153, 4.4mm

Wide

74VHC74N

N14A

14-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300" Wide