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DAC16FS Scheda tecnica(PDF) 6 Page - Analog Devices

Il numero della parte DAC16FS
Spiegazioni elettronici  16-Bit High Speed Current-Output DAC
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Homepage  http://www.analog.com
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DAC16FS Scheda tecnica(HTML) 6 Page - Analog Devices

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DAC16–Typical Performance Characteristics
REV. B
–6–
APPLICATIONS
Power Supplies, Bypassing, and Grounding
All precision converter products require careful application of
good grounding practices to maintain full-rated performance. As
is always the case with analog circuits operating in digital envi-
ronments, digital noise is prevalent; therefore, special care must
be taken to ensure that the DAC16’s inherent precision is main-
tained. This means that particularly good engineering judgment
should be exercised when addressing the power supply, ground-
ing, and bypassing issues using the DAC16.
The DAC16 was designed to operate from +5 V and –15 V
supplies. The +5 V supply primarily powers the digital portion
of the DAC16 and can consume 20 mA, maximum. Although
very little +5 V supply current is used by the reference amplifier,
large amounts of digital noise present on the +5 V supply can
introduce analog errors. It is, therefore, very important that the
+5 V supply be well filtered and regulated. The –15 V supply
provides most of the current for the reference amplifier and all
of the current for the internal DAC. Although the maximum
current in this supply is 10 mA, it must provide a low imped-
ance path for the DAC switch currents. Therefore, it too must
be well filtered and regulated.
The DAC16 includes two ground connections in order to mini-
mize system accuracy degradation arising from grounding er-
rors. The two ground pins are designated DGND (Pin 2) and
AGND (Pin 22). The DGND pin is the return for the digital
circuit sections of the DAC and serves as their input threshold
reference point. Thus, DGND should be connected to the same
ground as the circuitry that drives the digital inputs.
Pin 22, AGND, serves as the reference point for the 9-bit
lower-order DAC as well as the common for the reference am-
plifier, REFGND (Pin 21). This pin should also serve as the
reference point for all analog circuitry associated with the
DAC16. Therefore, to minimize any errors, it is recommended
that AGND connection on the DAC16 be connected to a high
quality analog ground. If the system contains any analog signal
path carrying a significant amount of current, then that path
should have its own return connection to Pin 22.
It is often advisable to maintain separate analog and digital
grounds throughout a complete system, tying them common to
one place only. If the common tie point is remote and an acci-
dental disconnection of that one common tie point were to oc-
cur due to card removal with power on, a large differential
voltage between the two commons could develop. To protect
devices that interface to both digital and analog parts of the
TEMPERATURE – C
–40
0
–20
0
20406080
5
10
15
20
ICC, LOGIC BITS = HIGH
IEE , LOGIC BITS = LOW
IEE , LOGIC BITS = HIGH
ICC, LOGIC BITS = LOW
Figure 13. Supply Current vs.
Temperature
BURN-IN TIME – Hours
–1.5
0
–1.0
–0.5
0
0.5
1.0
1.5
200
400
600
800
1000
1200
VCC = +5V, VEE = –15V
TA = +25 C, IREF = 0.5mA
WORST CASE + DNL
TYPICAL + DNL
TYPICAL – DNL
WORST CASE – DNL
Figure 16. Differential Nonlinearity
vs. Time Accelerated by Burn-In
LOGIC INPUT VOLTAGE – V
ALL DATA BITS
20
0
01
5
234
15
10
5
VEE = –15V
VCC = +5V
TA = +25 C
Figure 14. VCC Supply Current vs.
Logic Input Voltage, All Data Bits
BURN-IN TIME – Hours
–4
0
–3
–2
0
5
4
6
200
400
600
800
1000
1200
VCC = +5V, VEE = –15V
TA = +25 C, IREF = 0.5mA
WORST CASE + INL
TYPICAL + INL
TYPICAL – INL
WORST CASE – INL
–1
3
2
1
Figure 17. Integral Nonlinearity vs
Time Accelerated by Burn-In
TEMPERATURE – C
50
–40
40
30
20
10
0
–20
0
20406080
VCC = +5V
VEE = –15V
VIN = +5V
DB0 – DB4
DB5 – DB15
Figure 15. Digital Input Current vs.
Temperature
BURN-IN TIME – Hours
–30
0
–20
–10
0
110
120
130
200
400
600
800
1000
1200
VCC = +5V, VEE = –15V
TA = +25 C, IREF = 0.5mA
WORST CASE
+ GAIN ERROR
TYPICAL
GAIN ERROR
WORST CASE
– GAIN ERROR
Figure 18. Gain Error vs. Time
Accelerated by Burn-In


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