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AD9888KS-140 Scheda tecnica(PDF) 5 Page - Analog Devices

Il numero della parte AD9888KS-140
Spiegazioni elettronici  100/140/170/205 MSPS Analog Flat Panel Interface
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9888KS-140 Scheda tecnica(HTML) 5 Page - Analog Devices

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REV. A
AD9888
–5–
Table I. Complete Pinout List
Pin
Pin Type
Mnemonic
Function
Value
Number
Analog Video Inputs
RAIN0
Channel 0 Analog Input for Converter R
0.0 V to 1.0 V
5
GAIN0
Channel 0 Analog Input for Converter G
0.0 V to 1.0 V
13
BAIN0
Channel 0 Analog Input for Converter B
0.0 V to 1.0 V
20
RAIN1
Channel 1 Analog Input for Converter R
0.0 V to 1.0 V
8
GAIN1
Channel 1 Analog Input for Converter G
0.0 V to 1.0 V
17
BAIN1
Channel 1 Analog Input for Converter B
0.0 V to 1.0 V
23
Sync/Clock Inputs
HSYNC0
Channel 0 Horizontal SYNC Input
3.3 V CMOS
45
VSYNC0
Channel 0 Vertical SYNC Input
3.3 V CMOS
44
SOGIN0
Channel 0 Input for Sync-on-Green
0.0 V to 1.0 V
12
HSYNC1
Channel 1 Horizontal SYNC Input
3.3 V CMOS
43
VSYNC1
Channel 1 Vertical SYNC Input
3.3 V CMOS
42
SOGIN1
Channel 1 Input for Sync-on-Green
0.0 V to 1.0 V
16
CLAMP
Clamp Input (External CLAMP signal)
3.3 V CMOS
30
COAST
PLL Coast Signal Input
3.3 V CMOS
53
CKEXT
External Pixel Clock Input (to Bypass the PLL) or 10 k
Ω to Ground
3.3 V CMOS
54
CKINV
ADC Sampling Clock Invert
3.3 V CMOS
29
Sync Outputs
HSOUT
HSYNC Output Clock (Phase-Aligned with DATACK)
3.3 V CMOS
125
VSOUT
VSYNC Output Clock (Phase-Aligned with DATACK)
3.3 V CMOS
127
SOGOUT
Sync-on-Green Slicer Output
3.3 V CMOS
126
Voltage
REF BYPASS
Internal Reference Bypass (Bypass with 0.1
µF to Ground)
1.25 V
± 10% 2
Clamp Voltages
RMIDSCV
Red Channel Midscale Clamp Voltage Bypass
9
BMIDSCV
Blue Channel Midscale Clamp Voltage Bypass
24
PLL Filter
FILT
Connection for External Filter Components for Internal PLL
50
Power Supply
VD
Analog Power Supply
3.3 V
± 10%
VDD
Output Power Supply
3.3 V
± 10%
PVD
PLL Power Supply
3.3 V
± 10%
GND
Ground
0 V
Serial Port
SDA
Serial Port Data I/O
3.3 V CMOS
31
(2-Wire
SCL
Serial Port Data Clock
3.3 V CMOS
32
Serial Interface)
A0
Serial Port Address Input 1
3.3 V CMOS
33
Data Outputs
Red A[7:0]
Port A Outputs of Converter “Red,” Bit 7 is the MSB.
3.3 V CMOS
113–120
Red B[7:0]
Port B Outputs of Converter “Red,” Bit 7 is the MSB.
3.3 V CMOS
103–110
Green A[7:0]
Port A Outputs of Converter “Green,” Bit 7 is the MSB.
3.3 V CMOS
90–97
Green B[7:0]
Port B Outputs of Converter “Green,” Bit 7 is the MSB.
3.3 V CMOS
80–87
Blue A[7:0]
Port A Outputs of Converter “Blue,” Bit 7 is the MSB.
3.3 V CMOS
70–77
Blue B[7:0]
Port B Outputs of Converter “Blue,” Bit 7 is the MSB.
3.3 V CMOS
57–64
Data Clock
DATACK
Data Output Clock
3.3 V CMOS
123
Output
DATACK
Data Output Clock Complement
3.3 V CMOS
124


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