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AD9280ARSRL Scheda tecnica(PDF) 4 Page - Analog Devices

Il numero della parte AD9280ARSRL
Spiegazioni elettronici  Complete 8-Bit, 32 MSPS, 95 mW CMOS A/D Converter
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD9280ARSRL Scheda tecnica(HTML) 4 Page - Analog Devices

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AD9280
–4–
REV. D
ABSOLUTE MAXIMUM RATINGS*
With
Respect
Parameter
to
Min
Max
Units
AVDD
AVSS
–0.3
+6.5
V
DRVDD
DRVSS
–0.3
+6.5
V
AVSS
DRVSS
–0.3
+0.3
V
AVDD
DRVDD
–6.5
+6.5
V
MODE
AVSS
–0.3
AVDD + 0.3
V
CLK
AVSS
–0.3
AVDD + 0.3
V
Digital Outputs
DRVSS
–0.3
DRVDD + 0.3 V
AIN
AVSS
–0.3
AVDD + 0.3
V
VREF
AVSS
–0.3
AVDD + 0.3
V
REFSENSE
AVSS
–0.3
AVDD + 0.3
V
REFTF, REFTB
AVSS
–0.3
AVDD + 0.3
V
REFTS, REFBS
AVSS
–0.3
AVDD + 0.3
V
Junction Temperature
+150
°C
Storage Temperature
–65
+150
°C
Lead Temperature
10 sec
+300
°C
*Stresses above those listed under Absolute Maximum Ratings may cause perma-
nent damage to the device. This is a stress rating only; functional operation of the
device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum
ratings for extended periods may effect device reliability.
ORDERING GUIDE
Temperature
Package
Package
Model
Range
Description
Option*
AD9280ARS
–40
°C to +85°C 28-Lead SSOP
RS-28
AD9280ARSRL –40
°C to +85°C 28-Lead SSOP (Reel) RS-28
AD9280-EB
Evaluation Board
*RS = Shrink Small Outline.
Figure 2. Equivalent Circuits
f. CLAMPIN
g. MODE
h. REFSENSE
i. VREF
CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily
accumulate on the human body and test equipment and can discharge without detection.
Although the AD9280 features proprietary ESD protection circuitry, permanent damage may
occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD
precautions are recommended to avoid performance degradation or loss of functionality.
WARNING!
ESD SENSITIVE DEVICE
DRVDD
AVSS
DRVSS
DRVSS
AVDD
AVDD
AVSS
AVSS
AVDD
22
21
REFTF
REFTS
AVDD
AVSS
AVDD
AVSS
25
24
REFBS
REFBF
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
AVSS
AVDD
AVSS
AVDD
AVDD
AVSS
AVDD
AVSS
AVDD
AVSS
a. D0–D7, OTR
b. Three-State, Standby, Clamp
c. CLK
d. AIN
e. Reference


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