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AD8326ARP Scheda tecnica(PDF) 10 Page - Analog Devices |
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AD8326ARP Scheda tecnica(HTML) 10 Page - Analog Devices |
10 / 24 page REV. 0 AD8326 –10– APPLICATIONS General Applications The AD8326 is primarily intended for use as the upstream power amplifier (PA), also known as a line driver, in DOCSIS (Data Over Cable Service Interface Specification) certified cable modems, cable telephony systems, and CATV set-top boxes. The upstream signal is either a QPSK or QAM signal generated by a DSP, a dedicated QPSK/QAM modulator, or a DAC. In all cases the signal must be low-pass filtered before being applied to the PA in order to filter out-of-band noise and higher order harmonics from the amplified signal. Due to the varying distances between the cable modem and the headend, the upstream PA must be capable of varying the output power by applying gain or attenuation. The varying output power of the AD8326 ensures that the signal from the cable modem will have the proper level once it arrives at the headend. The upstream signal path also contains a transformer, a diplexer, and cable split- ters. The AD8326 has been designed to overcome losses associated with these passive components in the upstream cable path, particu- larly in modems that support cable telephony. AD8326ARP Applications The AD8326ARP is in a thermally enhanced PSOP2 package, and designed for single 12 V supply and output power applica- tions up to +69 dBmV. The AD8326ARP will provide maximum performance in 12 V systems. AD8326ARE Applications The AD8326ARE is in a TSSOP package with an exposed ther- mal pad. It is designed for dual ±5 V or single 10 V supplies. For applications requiring up to 65 dBmV of output power, lower cost, smaller package, and lower power dissipation, the TSSOP package is most appropriate. Operational Description The AD8326 consists of four analog functions in the transmit enable or forward mode. The input amplifier (preamp) can be used single-ended or differentially. If the input is used in the differential configuration, it is imperative that the input signals be 180 degrees out of phase and of equal amplitudes. This will ensure proper gain accuracy and harmonic performance. The preamp stage drives a vernier stage that provides the fine tune gain adjustment. The approximate step resolution of 0.75 dB is implemented in this stage and provides a total of approximately 5.25 dB of accumulated attenuation. After the vernier stage, a DAC provides the bulk of the AD8326’s attenuation (8 bits or 48 dB). The signals in the preamp and vernier gain blocks are differential to improve the PSRR and linearity. A differential current is fed from the DAC into the output stage, which amplifies these currents to the appropriate levels necessary to drive a 75 Ω load. The output stage utilizes negative feedback to implement a differential 75 Ω output impedance, which eliminates the need for external matching resistors needed in typical video (or video filter) termination requirements. SPI Programming The AD8326 is controlled through a serial peripheral interface (SPI) of three digital data lines, CLK, DATEN, and SDATA. Changing the gain requires 8 bits of data to be streamed into the SDATA port. The sequence of loading the SDATA register begins on the falling edge of the DATEN pin, which activates the CLK line. With the CLK line activated, data on the SDATA line is clocked into the serial shift register, Most Significant Bit (MSB) first, on the rising edge of the CLK pulses. Since a 7-bit shift register is used in the AD8326, the MSB of the 8-bit word is a “don’t care” bit and is shifted out of the register on the eighth clock pulse. The data is latched into the attenuator core on the rising edge of the DATEN line. This provides control over the changes in the output signal level. The serial interface timing for the AD8326 is shown in Figures 2 and 3. The programmable gain range of the AD8326 is –25.75 dB to +27.5 dB with steps of 0.75 dB. This provides a total gain range of 53.25 dB. The AD8326 was characterized with a TOKO transformer (TOKO #617DB-A0070), and the stated gain values include the losses due to the transformer. For gain codes from 0 through 71 the gain transfer function is: A dB dB CODE V =× [] 27 5 0 75 71 . – (. ( – ) where AV is the gain in dB and CODE is the decimal equivalent of the 8-bit word. Gain codes 0 to 71 provide linear changes in gain. Figure 4 shows the gain characteristics of the AD8326 for all possible values in an 8-bit word. Note that maximum gain is achieved at Code 71. From Code 72 through 127 the 5.25 dB of attenuation from the vernier stage is being applied over every eight codes, resulting in the saw tooth characteristic at the top of the gain range. Because the eighth bit is shifted out of the register, the gain characteristics for Codes 128 through 255 are identical to Codes 0 through 127, as depicted in Figure 4. 28 21 14 7 0 –7 –14 –21 –28 0 32 64 96 128 160 192 224 256 GAIN CODE – Decimal Figure 4. Gain Code vs. Gain |
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