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AD7829BN Scheda tecnica(PDF) 4 Page - Analog Devices |
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AD7829BN Scheda tecnica(HTML) 4 Page - Analog Devices |
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4 / 20 page  AD7822/AD7825/AD7829 –4– REV. B Parameter 5 V 10% 3 V 10% Unit Conditions/Comments t1 420 420 ns max Conversion Time. t2 20 20 ns min Minimum CONVST Pulsewidth. t3 30 30 ns min Minimum time between the rising edge of RD and next falling edge of convert start. t4 110 110 ns max EOC Pulsewidth. 70 70 ns min t5 10 10 ns max RD rising edge to EOC pulse high. t6 0 0 ns min CS to RD setup time. t7 0 0 ns min CS to RD hold time. t8 30 30 ns min Minimum RD Pulsewidth. t9 3 10 20 ns max Data access time after RD low. t10 4 5 5 ns min Bus relinquish time after RD high. 20 20 ns max t11 10 10 ns min Address setup time before falling edge of RD. t12 15 15 ns min Address hold time after falling edge of RD. t13 200 200 ns min Minimum time between new channel selection and convert start. tPOWER UP 25 25 µs typ Power-up time from rising edge of CONVST using on-chip reference. tPOWER UP 11 µs max Power-up time from rising edge of CONVST using external 2.5 V reference. NOTES 1Sample tested to ensure compliance. 2See Figures 20, 21, and 22. 3Measured with the load circuit of Figure 1 and defined as the time required for an output to cross 0.8 V or 2.4 V with V DD = 5 V ± 10%, and time required for an output to cross 0.4 V or 2.0 V with VDD = 3 V ± 10%. 4Derived from the measured time taken by the data outputs to change 0.5 V when loaded with the circuit of Figure 1. The measured number is then extrapolated back to remove the effects of charging or discharging the 50 pF capacitor. This means that the time, t 10, quoted in the timing characteristics is the true bus relinquish time of the part and as such is independent of external bus loading capacitances. ABSOLUTE MAXIMUM RATINGS * (TA = 25 °C unless otherwise noted) VDD to AGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V VDD to DGND . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V Analog Input Voltage to AGND VIN1 to VIN8 . . . . . . . . . . . . . . . . . . . –0.3 V to VDD + 0.3 V Reference Input Voltage to AGND . . . –0.3 V to VDD + 0.3 V VMID Input Voltage to AGND . . . . . . . –0.3 V to VDD + 0.3 V Digital Input Voltage to DGND . . . . . –0.3 V to VDD + 0.3 V Digital Output Voltage to DGND . . . . –0.3 V to VDD + 0.3 V Operating Temperature Range Industrial (B Version) . . . . . . . . . . . . . . . . –40 °C to +85°C Storage Temperature Range . . . . . . . . . . . . –65 °C to +150°C Junction Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . 150 °C Plastic DIP Package, Power Dissipation . . . . . . . . . . 450 mW θ JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 105 °C/W Lead Temperature, (Soldering, 10 sec) . . . . . . . . . . . 260 °C SOIC Package, Power Dissipation . . . . . . . . . . . . . . . 450 mW θ JA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 75 °C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 °C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . 220 °C TSSOP Package, Power Dissipation . . . . . . . . . . . . . 450 mW θJA Thermal Impedance . . . . . . . . . . . . . . . . . . . . . 128°C/W Lead Temperature, Soldering Vapor Phase (60 sec) . . . . . . . . . . . . . . . . . . . . . . . 215 °C Infrared (15 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . 220 °C ESD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 kV *Stresses above those listed under Absolute Maximum Ratings may cause perma- nent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those listed in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. (VREF IN/OUT = 2.5 V. All specifications –40 C to +85 C unless otherwise noted.) CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD7822/AD7825/AD7829 features proprietary ESD protection circuitry, perma- nent damage may occur on devices subjected to high-energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. WARNING! ESD SENSITIVE DEVICE TIMING CHARACTERISTICS1, 2 |
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