AD7665AST datasheet(3/24 Pages) AD

Il numero della parte	AD7665AST

Spiegazioni elettronici	16-Bit, 570 kSPS CMOS ADC

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Produttore elettronici	AD [Analog Devices]

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REV. 0

–3–

AD7665

Parameter

Conditions

Min

Typ

Max

Unit

POWER SUPPLIES (Continued)

Power Dissipation

5, 6

444 kSPS Throughput

7

64

74

mW

100 SPS Throughput

7

15

µW

570 kSPS Throughput

4

93

107

mW

In Power-Down Mode

8

7

µW

TEMPERATURE RANGE

9

Specified Performance

TMIN to TMAX

–40

+85

°C

NOTES

1LSB means Least Significant Bit. With the

± 5 V input range, one LSB is 152.588 µV.

2See Definition of Specifications section. These specifications do not include the error contribution from the external reference.

3All specifications in dB are referred to a full-scale input FS. Tested with an input signal at 0.5 dB below full scale unless otherwise specified.

4In warp mode.

5Tested in parallel reading mode.

6Tested with the 0 V to 5 V range and V

IN – VINGND = 0 V. See Power Dissipation section.

7In impulse mode.

8With OVDD below DVDD + 0.3 V and all digital inputs forced to OVDD or OGND respect ively.

9Contact factory for extended temperature range.

Specifications subject to change without notice.

Table I. Analog Input Configuration

Input Voltage

Input

Range

IND (4R)

INC (4R)

INB (2R)

INA (R)

Impedance

1

±4 REF

VIN

INGND

REF

5.85 k

Ω

±2 REF

VIN

INGND

REF

3.41 k

Ω

±REF

VIN

REF

2.56 k

Ω

0 V to 4 REF

VIN

INGND

3.41 k

Ω

0 V to 2 REF

VIN

INGND

2.56 k

Ω

0 V to REF

VIN

Note 2

NOTES

1Typical analog input impedance.

2For this range the input is high impedance.

TIMING SPECIFICATIONS

Symbol

Min

Typ

Max

Unit

Refer to Figures 11 and 12

Convert Pulsewidth

t1

5ns

Time Between Conversions

t2

1.75/2/2.25

Note 1

µs

(Warp Mode/Normal Mode/Impulse Mode)

CNVST LOW to BUSY HIGH Delay

t3

30

ns

BUSY HIGH All Modes Except in Master Serial Read after

t4

0.75/1/1.25

µs

Convert Mode (Warp Mode/Normal Mode/Impulse Mode)

Aperture Delay

t5

2ns

End of Conversion to BUSY LOW Delay

t6

10

ns

Conversion Time (Warp Mode/Normal Mode/Impulse Mode)

t7

0.75/1/1.25

µs

Acquisition Time

t8

1

µs

RESET Pulsewidth

t9

10

ns

Refer to Figures 13, 14, and 15 (Parallel Interface Modes)

CNVST LOW to DATA Valid Delay

t10

0.75/1/1.25

µs

(Warp Mode/Normal Mode/Impulse Mode)

DATA Valid to BUSY LOW Delay

t11

20

ns

Bus Access Request to DATA Valid

t12

40

ns

Bus Relinquish Time

t13

515

ns

Refer to Figures 17 and 18 (Master Serial Interface Modes)

2

CS LOW to SYNC Valid Delay

t14

10

ns

CS LOW to Internal SCLK Valid Delay

t15

10

ns

CS LOW to SDOUT Delay

t16

10

ns

CNVST LOW to SYNC Delay (Read During Convert)

t17

25/275/525

ns

(Warp Mode/Normal Mode/Impulse Mode)

(–40 C to +85 C, AVDD = DVDD = 5 V, OVDD = 2.7 V to 5.25 V, unless otherwise noted.)

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