AD7538

REV. A

–7–

The transfer function of Figure 7 is:

Gain

=

= –

(1)

N

(2)

Where: n is the resolution of the DAC

Substituting this expression into Equation 1 and assuming zero

fies to

= –

N

(3)

The ratio N/2

such, is the fractional representation of the digital input word.

= –

N

=

–1

D

(4)

Equation 4 indicates that the gain of the circuit can be varied

from 16,384 down to unity (actually 16,384/16,383) in 16,383

steps. The all 0s code is never applied. This avoids an open-

loop condition thereby saturating the amplifier. With the all 0s

code excluded there remains 2

ing a choice of 2

range is

= 20 log

= 84 dB.

APPLICATION HINTS

Output Offset: CMOS D/A converters in circuits such as Fig-

ures 4 and 5 exhibit a code dependent output resistance which

in turn can cause a code dependent error voltage at the output

of the amplifier. The maximum amplitude of this error, which

greater than 0.25 mV, or (25

ture range of operation. The AD711 is a suitable op amp. The

op amp has a wide bandwidth and high slew rate and is recom-

mended for ac and other applications requiring fast settling.

General Ground Management: Since the AD7538 is speci-

fied for high accuracy, it is important to use a proper grounding

technique. AC or transient voltages between AGND and

DGND can cause noise injection into the analog output. The

simplest method of ensuring that voltages at AGND and

DGND are equal is to tie AGND and DGND together at the

AD7538. In more complex systems where the AGND and

DGND intertie is on the backplane, it is recommended that two

diodes be connected in inverse parallel between the AD7538

AGND and DGND pins (1N914 or equivalent).

MICROPROCESSOR INTERFACING

The AD7538 is designed for easy interfacing to 16-bit micro-

processors and can be treated as a memory mapped peripheral.

This reduces the amount of external logic needed for interfacing

to a minimal.

AD7538-8086 INTERFACE

Figure 8 shows the 8086 processor interface to a single device.

In this setup the double buffering feature (using LDAC) of the

DAC is not used. The 14-bit word is written to the DAC in one

MOV instruction and the analog output responds immediately.

Figure 8. AD7538-8086 Interface Circuit

In a multiple DAC system the double buffering of the AD7538

allows the user to simultaneously update all DACs. In Figure 9,

a 14-bit word is loaded to the Input Registers of each of the

DACs in sequence. Then, with one instruction to the appropri-

ate address, CS4 (i.e., LDAC) is brought low, updating all the

DACs simultaneously.

Figure 9. AD7538-8086 Interface: Multiple DAC System