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AD660AR Scheda tecnica(PDF) 3 Page - Analog Devices |
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AD660AR Scheda tecnica(HTML) 3 Page - Analog Devices |
3 / 12 page AD660 REV. A –3– (With the exception of Total Harmonic Distortion + Noise and Signal-to-Noise Ratio, these characteristics are included for design guidance only and are not subject to test. THD+N and SNR are 100% tested. TMIN ≤ T A ≤ T MAX, VCC = +15 V, VEE = –15 V, VLL = +5 V except where noted.) Parameter Limit Units Test Conditions/Comments Output Settling Time 13 µs max 20 V Step, TA = +25 °C (Time to ±0.0008% FS 8 µs typ 20 V Step, TA = +25°C with 2 k Ω, 1000 pF Load) 10 µs typ 20 V Step, TMIN ≤ T A ≤ T MAX 6 µs typ 10 V Step, TA = +25 °C 8 µs typ 10 V Step, TMIN ≤ TA ≤ TMAX 2.5 µs typ 1 LSB Step, TMIN ≤ T A ≤ T MAX Total Harmonic Distortion + Noise A, B, S Grade 0.009 % max 0 dB, 990.5 Hz; Sample Rate = 96 kHz; TA = +25 °C A, B, S Grade 0.056 % max –20 dB, 990.5 Hz; Sample Rate = 96 kHz; TA = +25 °C A, B, S Grade 5.6 % max –60 dB, 990.5 Hz; Sample Rate = 96 kHz; TA = +25°C Signal-to-Noise Ratio 83 dB min TA = +25°C Digital-to-Analog Glitch Impulse 15 nV-s typ DAC Alternately Loaded with 8000H and 7FFFH Digital Feedthrough 2 nV-s typ DAC Alternately Loaded with 0000H and FFFFH; CS High Output Noise Voltage 120 nV/ √Hz typ Measured at VOUT; 20 V Span; Excludes Reference Density (1 kHz – 1 MHz) Reference Noise 125 nV/ √Hz typ Measured at REF OUT Specifications subject to change without notice. AC PERFORMANCE CHARACTERISTICS WARNING! ESD SENSITIVE DEVICE CAUTION ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although the AD660 features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality. ABSOLUTE MAXIMUM RATINGS* VCC to AGND . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +17.0 V VEE to AGND . . . . . . . . . . . . . . . . . . . . . . . +0.3 V to –17.0 V VLL to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . –0.3 V to +7 V AGND to DGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±1 V Digital Inputs (Pins 5 through 23) to DGND . . . . . . –1.0 V to +7.0 V REF IN to AGND . . . . . . . . . . . . . . . . . . . . . . . . . . . . ±10.5 V Span/Bipolar Offset to AGND . . . . . . . . . . . . . . . . . . . ±10.5 V Ref Out, VOUT . . . . . . . Indefinite Short to AGND, DGND, VCC, VEE, and VLL Power Dissipation (Any Package) To +60 °C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1000 mW Derates above +60 °C . . . . . . . . . . . . . . . . . . . . 8.7 mW/°C Storage Temperature . . . . . . . . . . . . . . . . . . . –65 °C to +150°C Lead Temperature Range (Soldering 10 sec) . . . . . . . . . . . . . . . . . . . . . . . . . . . +300 °C *Stresses above those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. PIN CONFIGURATION 1 2 3 7 24 23 22 18 8 9 10 17 16 15 11 12 14 13 4 5 21 20 6 19 TOP VIEW (Not to Scale) AD660 DB7, 15 S OUT SPAN, BIPOLAR OFFSET V OUT AGND REF OUT REF IN LDAC DGND –V EE +V CC +V LL CS HBE SER CLR DB6, 14 DB5, 13 DB4, 12 DB3, 11 DB2, 10 DB0, 8, SIN DB1, 9, MSB/LSB LBE, UNI/BIP CLEAR |
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