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AD624A Scheda tecnica(PDF) 9 Page - Analog Devices |
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AD624A Scheda tecnica(HTML) 9 Page - Analog Devices |
9 / 15 page REV. C AD624 –9– NOISE The AD624 is designed to provide noise performance near the theoretical noise floor. This is an extremely important design criteria as the front end noise of an instrumentation amplifier is the ultimate limitation on the resolution of the data acquisition system it is being used in. There are two sources of noise in an instrument amplifier, the input noise, predominantly generated by the differential input stage, and the output noise, generated by the output amplifier. Both of these components are present at the input (and output) of the instrumentation amplifier. At the input, the input noise will appear unaltered; the output noise will be attenuated by the closed loop gain (at the output, the output noise will be unaltered; the input noise will be ampli- fied by the closed loop gain). Those two noise sources must be root sum squared to determine the total noise level expected at the input (or output). The low frequency (0.1 Hz to 10 Hz) voltage noise due to the output stage is 10 µV p-p, the contribution of the input stage is 0.2 µV p-p. At a gain of 10, the RTI voltage noise would be 1 µV p-p, 10 G 2 + 0.2 ()2 . The RTO voltage noise would be 10.2 µV p-p, 102 + 0.2 G () ()2 . These calculations hold for applications using either internal or external gain resistors. INPUT BIAS CURRENTS Input bias currents are those currents necessary to bias the input transistors of a dc amplifier. Bias currents are an additional source of input error and must be considered in a total error budget. The bias currents when multiplied by the source resis- tance imbalance appear as an additional offset voltage. (What is of concern in calculating bias current errors is the change in bias current with respect to signal voltage and temperature.) Input offset current is the difference between the two input bias cur- rents. The effect of offset current is an input offset voltage whose magnitude is the offset current times the source resistance. AD624 –VS +VS LOAD TO POWER SUPPLY GROUND a. Transformer Coupled AD624 –VS +VS LOAD TO POWER SUPPLY GROUND b. Thermocouple AD624 –VS +VS LOAD TO POWER SUPPLY GROUND c. AC-Coupled Figure 31. Indirect Ground Returns for Bias Currents Although instrumentation amplifiers have differential inputs, there must be a return path for the bias currents. If this is not provided, those currents will charge stray capacitances, causing the output to drift uncontrollably or to saturate. Therefore, when amplifying “floating” input sources such as transformers and thermocouples, as well as ac-coupled sources, there must still be a dc path from each input to ground, (see Figure 31). COMMON-MODE REJECTION Common-mode rejection is a measure of the change in output voltage when both inputs are changed by equal amounts. These specifications are usually given for a full-range input voltage change and a specified source imbalance. “Common-Mode Rejection Ratio” (CMRR) is a ratio expression while “Common- Mode Rejection” (CMR) is the logarithm of that ratio. For example, a CMRR of 10,000 corresponds to a CMR of 80 dB. In an instrumentation amplifier, ac common-mode rejection is only as good as the differential phase shift. Degradation of ac common-mode rejection is caused by unequal drops across differing track resistances and a differential phase shift due to varied stray capacitances or cable capacitances. In many appli- cations shielded cables are used to minimize noise. This tech- nique can create common-mode rejection errors unless the shield is properly driven. Figures 32 and 33 shows active data guards which are configured to improve ac common-mode rejection by “bootstrapping” the capacitances of the input cabling, thus minimizing differential phase shift. AD624 RG2 –VS REFERENCE VOUT –INPUT +INPUT +VS G = 200 AD711 100 Figure 32. Shield Driver, G ≥ 100 AD624 RG1 –VS REFERENCE VOUT –INPUT +INPUT +VS –VS AD712 100 100 RG2 Figure 33. Differential Shield Driver |
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