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AD2S93AP Scheda tecnica(PDF) 9 Page - Analog Devices

Il numero della parte AD2S93AP
Spiegazioni elettronici  Low Cost LVDT-to-Digital Converter
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Produttore elettronici  AD [Analog Devices]
Homepage  http://www.analog.com
Logo AD - Analog Devices

AD2S93AP Scheda tecnica(HTML) 9 Page - Analog Devices

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–9–
REV. A
AD2S93
Two-Wire LVDT Connection
This method should be used in cases where the sum of the
LVDT secondary output voltages (A + B) is not constant with
LVDT displacement over the desired stroke length. This method
of connection, shown in Figure 7, still maintains the ratiometric
operation and the insensitivity to variations in reference ampli-
tude and frequency. However, the phase shift between VREF
and V1 should be minimized to maintain accuracy (see Section
“PHASE SHIFT AND QUADRATURE EFFECTS”). Sug-
gested phase compensation circuits are shown in Figure 7.
PHASE SHIFT AND QUADRATURE EFFECTS
Reference to signal phase shift can be high in LVDTs, some-
times in the order of 70 degrees. If the converter is connected
as in Figures 5 and 6, any effects due to this phase shift are
minimized. This connection method, therefore, provides out-
standing benefits.
The additional gain error caused by reference to signal phase
shifts is given by:
(1 – cos
θ) × 100% of FSR
where
θ = phase shift between V
REF and DIFF.
When the phase shift between VREF and V1 is zero, additional
quadrature on the signal will have no effect on the converter.
This is another benefit of the conversion method. For example,
when a REF lags (A–B) by approximately 10
°, the gain error is
approximately 1%. When (A–B) lags REF by approximately
10
°, the gain error is approximately 2%.
REMOTE MULTIPLE SENSOR INTERFACING
The DATA output of the AD2S93 is held in a high impedance
state until CS is taken LO. This allows a user to operate the
AD2S93 in an application with more than one converter con-
nected on the same line. Figure 8 shows four LVDTs interfaced
to four AD2S93s. Excitation for the LVDT is provided locally
by an oscillator.
SCLK, DATA and two address lines are fed down low loss
cables suitable for communication links. The two address lines
are decoded locally into CS for the individual converters. Data
is received and transmitted using transmitters and receivers.
2-4 DECODING
(74HC139)
LVDT
LVDT
LVDT
LVDT
AD2S93
1
AD2S93
2
AD2S93
3
AD2S93
4
OSC
BUFFER
4
4
4
4
2
2
0V
VSS
A0
A1
CS4
VDD
CS3
CS2
CS1
DATA
SCLK
Figure 8. Remote Sensor Interface
NC = NO CONNECT
OVR
NULL
DEMODOUT
DIR
4
2
3
25
24
21
20
19
23
22
1
5
69
10
7
8
TOP VIEW
(Not to Scale)
AD2S93
+5V
0V
–5V
R4
R3
PHASE
SHIFT
CCT
OSC
PISTON
V
DD
PHASE LAG = ARCTAN 2
π fRC
4
2
3
25
24
21
20
19
23
22
1
5
69
10
7
8
TOP VIEW
(Not to Scale)
AD2S93
12k
PHASE
SHIFT
CCT
PHASE LEAD = ARCTAN
2
π fRC
1
V
DD
V
SS
DGND
AGND
LOS
GAIN
DIFF
11
NC
26
27
28
A
B
12
15
18
17
16
14
13
REF
C
R
R
C
C3
R5
C4
R6
R2
C2
C1
R7
Figure 7. Two-Wire LVDT Connection


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