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FM24V02 Scheda tecnica(PDF) 8 Page - Cypress Semiconductor

Il numero della parte FM24V02
Spiegazioni elettronici  256Kb Serial 3V F-RAM Memory
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Produttore elettronici  CYPRESS [Cypress Semiconductor]
Homepage  http://www.cypress.com
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FM24V02 Scheda tecnica(HTML) 8 Page - Cypress Semiconductor

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FM24V02 - 256Kb I2C FRAM
Rev. 3.0
Jan. 2012
Page 8 of 16
Sleep Mode
A
low
power
mode
called
Sleep
Mode
is
implemented on both FM24V02 and FM24VN02
devices. The device will enter this low power state
when the Sleep command 86h is clocked-in. Sleep
Mode entry can be entered as follows:
1.
The master sends a START command.
2.
The master sends Reserved Slave ID 0xF8
3.
The master sends the I
2C-bus slave address of
the slave device it needs to identify. The last
bit is a ‘Don’t care’ value (R/W bit). Only one
device must acknowledge this byte (the one
that has the I
2C-bus slave address).
4.
The master sends a Re-START command.
5.
The master sends Reserved Slave ID 0x86
6.
The FM24V02 sends an ACK.
7.
The master sends STOP to ensure the device
enters sleep mode.
Once in sleep mode, the device draws IZZ current, but
the device continues to monitor the I
2C pins. Once
the master sends a Slave Address that the FM24V02
identifies, it will “wakeup” and be ready for normal
operation within tREC (400 s max.). As an alternative
method of determining when the device is ready, the
master can send read or write commands and look for
an ACK. While the device is waking up, it will
NACK the master until it is ready.
S
A P
By Master
By FM24V02
Start
Address
Stop
S
A
Rsvd Slave ID (F8)
Slave Address
A
Start
Address
Acknowledge
Rsvd Slave ID (86)
X
Figure 12. Sleep Mode Entry


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